Chris Chu

Publication Activity (10 Years)

Years Active: 1993-2022
Publications (10 Years): 21

Top Topics

Iterative Scaling

Lagrangian Relaxation

Integer Programming

Negative Matrix Factorization

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Chung-Hsien Wu, Wai-Kei Mak, Chris Chu
Linear-time Mixed-Cell-Height Legalization for Minimizing Maximum Displacement. ISPD (2022)
Tianxiang Gao, Songtao Lu, Jia Liu, Chris Chu
On the Convergence of Randomized Bregman Coordinate Descent for Non-Lipschitz Composite Problems. ICASSP (2021)
Tianxiang Gao, Songtao Lu, Jia Liu, Chris Chu
Randomized Bregman Coordinate Descent Methods for Non-Lipschitz Optimization. CoRR (2020)
Ankur Sharma, David G. Chinnery, Tiago Reimann, Sarvesh Bhardwaj, Chris Chu
Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (7) (2020)
Tianxiang Gao, Songtao Lu, Jia Liu, Chris Chu
Leveraging Two Reference Functions in Block Bregman Proximal Gradient Descent for Non-convex and Non-Lipschitz Problems. CoRR (2019)
Ankur Sharma, David G. Chinnery, Chris Chu
Lagrangian Relaxation Based Gate Sizing With Clock Skew Scheduling - A Fast and Effective Approach. ISPD (2019)
Rohit Reddy Takkala, Chris Chu
CHIP: Clustering Hotspots in Layout Using Integer Programming. J. Electr. Comput. Eng. 2019 (2019)
Chris Chu
Pioneer Research on Mathematical Models and Methods for Physical Design. ISPD (2018)
Tianxiang Gao, Chris Chu
DID: Distributed Incremental Block Coordinate Descent for Nonnegative Matrix Factorization. CoRR (2018)
Tianxiang Gao, Chris Chu
DID: Distributed Incremental Block Coordinate Descent for Nonnegative Matrix Factorization. AAAI (2018)
Hsin-Ho Huang, Huimei Cheng, Chris Chu, Peter A. Beerel
Area Optimization of Timing Resilient Designs Using Resynthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (6) (2018)
Yixiao Ding, Chris Chu, Wai-Kei Mak
Self-Aligned Double Patterning-Aware Detailed Routing With Double Via Insertion and Via Manufacturability Consideration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (3) (2018)
Chris Chu, Mustafa Ozdal
Introduction to the Special Section on Advances in Physical Design Automation. ACM Trans. Design Autom. Electr. Syst. 23 (4) (2018)
Gang Wu, Chris Chu
A Fast Incremental Cycle Ratio Algorithm. ISPD (2017)
Ankur Sharma, David G. Chinnery, Shrirang Dhamdhere, Chris Chu
Rapid gate sizing with fewer iterations of Lagrangian Relaxation. ICCAD (2017)
Wai-Kei Mak, Wan-Sin Kuo, Shi-Han Zhang, Seong-I Lei, Chris Chu
Minimum Implant Area-Aware Placement and Threshold Voltage Refinement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (7) (2017)
Yixiao Ding, Chris Chu, Wai-Kei Mak
Pin Accessibility-Driven Detailed Placement Refinement. ISPD (2017)
Gang Wu, Chris Chu
Two Approaches for Timing-Driven Placement by Lagrangian Relaxation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (12) (2017)
Yixiao Ding, Chris Chu, Wai-Kei Mak
Self-Aligned Double Patterning Lithography Aware Detailed Routing With Color Preassignment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (8) (2017)
Seong-I Lei, Wai-Kei Mak, Chris Chu
Minimum implant area-aware placement and threshold voltage refinement. ASP-DAC (2016)
Gang Wu, Chris Chu
Detailed Placement Algorithm for VLSI Design With Double-Row Height Standard Cells. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (9) (2016)
Yixiao Ding, Chris Chu, Wai-Kei Mak
Throughput Optimization for SADP and E-beam based Manufacturing of 1D Layout. DAC (2014)
Gang Wu, Tao Lin, Hsin-Ho Huang, Chris Chu, Peter A. Beerel
Asynchronous circuit placement by lagrangian relaxation. ICCAD (2014)
Wai-Kei Mak, Chris Chu
E-Beam Lithography Character and Stencil Co-Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (5) (2014)
Jackey Z. Yan, Natarajan Viswanathan, Chris Chu
An Effective Floorplan-Guided Placement Algorithm for Large-Scale Mixed-Size Designs. ACM Trans. Design Autom. Electr. Syst. 19 (3) (2014)
Seong-I Lei, Chris Chu, Wai-Kei Mak
Double patterning-aware detailed routing with mask usage balancing. ISQED (2014)
Tao Lin, Chris Chu
POLAR 2.0: An Effective Routability-Driven Placer. DAC (2014)
Chris Chu, Wai-Kei Mak
Flexible packed stencil design with multiple shaping apertures for e-beam lithography. ASP-DAC (2014)
Jackey Z. Yan, Chris Chu
SDS: An Optimal Slack-Driven Block Shaping Algorithm for Fixed-Outline Floorplanning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (2) (2013)
Yanheng Zhang, Chris Chu
RegularRoute: An Efficient Detailed Router Applying Regular Routing Patterns. IEEE Trans. Very Large Scale Integr. Syst. 21 (9) (2013)
J. Morris Chang, Chi-Chen Fang, Kuan-Hsing Ho, Norene Kelly, Pei Yuan Wu, Yixiao Ding, Chris Chu, Stephen B. Gilbert, Ahmed E. Kamal, Sun-Yuan Kung
Capturing Cognitive Fingerprints from Keystroke Dynamics. IT Prof. 15 (4) (2013)
Tao Lin, Chris Chu, Joseph R. Shinnerl, Ismail Bustany, Ivailo Nedelchev
POLAR: placement based on novel rough legalization and refinement. ICCAD (2013)
Yanheng Zhang, Chris Chu
Fast and Effective Placement Refinement for Routability. IEEE Trans. Very Large Scale Integr. Syst. 21 (9) (2013)
Wai-Kei Mak, Chris Chu
Rethinking the Wirelength Benefit of 3-D Integration. IEEE Trans. Very Large Scale Integr. Syst. 20 (12) (2012)
Min Pan, Yue Xu, Yanheng Zhang, Chris Chu
FastRoute: An Efficient and High-Quality Global Router. VLSI Design 2012 (2012)
Jackey Z. Yan, Chris Chu
Optimal slack-driven block shaping algorithm in fixed-outline floorplanning. ISPD (2012)
Wai-Kei Mak, Yu-Chen Lin, Chris Chu, Ting-Chi Wang
Pad Assignment for Die-Stacking System-in-Package Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (11) (2012)
Yanheng Zhang, Chris Chu
GDRouter: interleaved global routing and detailed routing for ultimate routability. DAC (2012)
Xin Zhao, Chris Chu
Line Search-Based Inverse Lithography Technique for Mask Design. VLSI Design 2012 (2012)
Gaurav Ajwani, Chris Chu, Wai-Kei Mak
FOARS: FLUTE Based Obstacle-Avoiding Rectilinear Steiner Tree Construction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (2) (2011)
Yue Xu, Chris Chu
MGR: Multi-level global router. ICCAD (2011)
Yanheng Zhang, Chris Chu
RegularRoute: an efficient detailed router with regular routing patterns. ISPD (2011)
Yue Xu, Chris Chu
An auction based pre-processing technique to determine detour in global routing. ICCAD (2010)
Yue Xu, Chris Chu
A matching based decomposer for double patterning lithography. ISPD (2010)
Natarajan Viswanathan, Gi-Joon Nam, Jarrod A. Roy, Zhuo Li, Charles J. Alpert, Shyam Ramji, Chris Chu
ITOP: integrating timing optimization within placement. ISPD (2010)
Gaurav Ajwani, Chris Chu, Wai-Kei Mak
FOARS: FLUTE based obstacle-avoiding rectilinear steiner tree construction. ISPD (2010)
Jackey Z. Yan, Chris Chu, Wai-Kei Mak
SafeChoice: a novel clustering algorithm for wirelength-driven placement. ISPD (2010)
Jackey Z. Yan, Chris Chu
DeFer: Deferred Decision Making Enabled Fixed-Outline Floorplanning Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (3) (2010)
Yu-Chen Lin, Wai-Kei Mak, Chris Chu, Ting-Chi Wang
Pad assignment for die-stacking System-in-Package design. ICCAD (2009)
Jackey Z. Yan, Natarajan Viswanathan, Chris Chu
Handling complexities in modern large-scale mixed-size placement. DAC (2009)
Yue Xu, Chris Chu
GREMA: Graph reduction based efficient mask assignment for double patterning technology. ICCAD (2009)
Yue Xu, Yanheng Zhang, Chris Chu
FastRoute 4.0: global router with efficient via minimization. ASP-DAC (2009)
Yanheng Zhang, Chris Chu
CROP: Fast and effective congestion refinement of placement. ICCAD (2009)
Jackey Z. Yan, Chris Chu
DeFer: deferred decision making enabled fixed-outline floorplanner. DAC (2008)
Yanheng Zhang, Yue Xu, Chris Chu
FastRoute3.0: a fast and high quality global router based on virtual capacity. ICCAD (2008)
Chris Chu
FLUTE: fast lookup table based wirelength estimation technique. ICCAD (2004)
Wei Zou, Chris Chu, Sudhakar M. Reddy, Irith Pomeranz
Optimizing SOC Test Resources using Dual Sequences. VLSI-SOC (2003)
Mee Yee Chan, Francis Y. L. Chin, Chris Chu, Wei-Kei Mak
Dilation-5 Embedding of 3-Dimensional Grids into Hypercubes. J. Parallel Distributed Comput. 33 (1) (1996)
Mee Yee Chan, Francis Y. L. Chin, Chris Chu, Wai-Kei Mak
Dilation-5 Embedding of 3-Dimensional Grids into Hypercubes. SPDP (1993)