Jens Lienig

ORCID

Publication Activity (10 Years)

Years Active: 1992-2023
Publications (10 Years): 31

Top Venues

Dresden University of Technology, Germany (PHD)

Education History

Dresden University of Technology, Germany

PHD

Publications

Susann Rothe, Jens Lienig
Combined Modeling of Electromigration, Thermal and Stress Migration in AC Interconnect Lines. ISPD (2023)
Iris Hui-Ru Jiang, David G. Chinnery, Gracieli Posser, Jens Lienig
Introduction to the Special Section on Advances in Physical Design Automation. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Benjamin Prautsch, Thomas Markwirth, Frank Schenkel, Reimund Wittmann, Uwe Eichler, Jens Lienig
A Multi-level Analog IC Design Flow for Fast Performance Estimation Using Template-based Layout Generators and Structural Models. SMACD (2022)
Sebastian Pech, René Richter, Jens Lienig
Non-occlusive pumping principle for blood pump application. Autom. 70 (11) (2022)
Susann Rothe, Jens Lienig
Reliability by Design: Avoiding Migration-Induced Failure in IC Interconnects. SBCCI (2022)
Andreas Krinke, Shubham Rai, Akash Kumar, Jens Lienig
Exploring Physical Synthesis for Circuits based on Emerging Reconfigurable Nanotechnologies. ICCAD (2021)
Jens Lienig, Susann Rothe, Matthias Thiele, Nikhil Rangarajan, Mohammed Ashraf, Mohammed Nabeel, Hussam Amrouch, Ozgur Sinanoglu, Johann Knechtel
Toward Security Closure in the Face of Reliability Effects ICCAD Special Session Paper. ICCAD (2021)
Tilman Horst, Robert Fischbach, Jens Lienig
A Globally-optimized Co-design Approach for Heterogeneous Systems Using Convex Optimization. ECCTD (2020)
Steve Bigalke, Jens Lienig
Avoidance vs. repair: New approaches to increasing electromigration robustness in VLSI routing. Integr. 75 (2020)
Andreas Krinke, Tilman Horst, Georg Gläser, Martin Grabmann, Tobias Markus, Benjamin Prautsch, Uwe Hatnik, Jens Lienig
From Constraints to Tape-Out: Towards a Continuous AMS Design Flow. DDECS (2019)
Axel Hald, Robert Wolf, Johannes Seelhorst, Jürgen Scheible, Jens Lienig, Stefan Tibus, Mike Schwarz
Parasitic Extraction Methodology for MEMS Sensors with Active Devices. SMACD (2019)
Robert Fischbach, Tilman Horst, Jens Lienig
A Graph-Based Model of Micro-Transfer Printing for Cost-Optimized Heterogeneous 2.5D Systems. 3DIC (2019)
Robert Fischbach, Tilman Horst, Jens Lienig
Assembly-Related Chip/Package Co-Design of Heterogeneous Systems Manufactured by Micro-Transfer Printing. DATE (2019)
Axel Hald, Pekka Herzogenrath, Jürgen Scheible, Jens Lienig, Johannes Seelhorst, Peter Brandl
Full custom MEMS design: A new method for the analysis of motion-dependent parasitics. Integr. 63 (2018)
Steve Bigalke, Jens Lienig
FLUTE-EM: Electromigration-Optimized Net Considering Topology Currents and Mechanical Stress. VLSI-SoC (2018)
Jens Lienig, Matthias Thiele
The Pressing Need for Electromigration-Aware Physical Design. ISPD (2018)
Johann Knechtel, Jens Lienig, Ibrahim Abe M. Elfadel
Multi-Objective 3D Floorplanning with Integrated Voltage Assignment. ACM Trans. Design Autom. Electr. Syst. 23 (2) (2018)
Sergii Osmolovskyi, Johann Knechtel, Igor L. Markov, Jens Lienig
Optimal die placement for interposer-based 3D ICs. ASP-DAC (2018)
Steve Bigalke, Jens Lienig, Thorben Casper, Sebastian Schöps
Increasing EM Robustness of Placement and Routing Solutions based on Layout-Driven Discretization. PRIME (2018)
Steve Bigalke, Jens Lienig, Göran Jerke, Jürgen Scheible, Roland Jancke
The need and opportunities of electromigration-aware integrated circuit design. ICCAD (2018)
Axel Hald, Johannes Seelhorst, Pekka Herzogenrath, Jürgen Scheible, Jens Lienig
A new method for the analysis of movement dependent parasitics in full custom designed MEMS sensors. SMACD (2017)
Benjamin Prautsch, Uwe Eichler, Torsten Reich, Jens Lienig
MESH: Explicit and flexible generation of analog arrays. SMACD (2017)
Matthias Thiele, Steve Bigalke, Jens Lienig
Exploring the use of the finite element method for electromigration analysis in future physical design. VLSI-SoC (2017)
Johann Knechtel, Ozgur Sinanoglu, Ibrahim Abe M. Elfadel, Jens Lienig, Cliff C. N. Sze
Large-Scale 3D Chips: Challenges and Solutions for Design Automation, Testing, and Trustworthy Integration. IPSJ Trans. Syst. LSI Des. Methodol. 10 (2017)
Matthias Thiele, Steve Bigalke, Jens Lienig
Electromigration Analysis of VLSI Circuits Using the Finite Element Method. VLSI-SoC (Selected Papers) (2017)
Johann Knechtel, Jens Lienig
Physical Design Automation for 3D Chip Stacks: Challenges and Solutions. ISPD (2016)
Benjamin Prautsch, Uwe Eichler, Sunil Satish Rao, Bjorn Zeugmann, Ajith Puppala, Torsten Reich, Jens Lienig
IIP framework: A tool for reuse-centric analog circuit design. SMACD (2016)
Axel Hald, Johannes Seelhorst, Mathias Reimann, Jürgen Scheible, Jens Lienig
A novel polygon-based circuit extraction algorithm for full custom designed MEMS sensors. SMACD (2016)
Steve Bigalke, Jens Lienig
Load-Aware Redundant Via Insertion for Electromigration Avoidance. ISPD (2016)
Jürgen Scheible, Jens Lienig
Automation of Analog IC Layout: Challenges and Solutions. ISPD (2015)
Johann Knechtel, Evangeline F. Y. Young, Jens Lienig
Planning Massive Interconnects in 3-D Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (11) (2015)
Johann Knechtel, Evangeline F. Y. Young, Jens Lienig
Structural planning of 3D-IC interconnects by block alignment. ASP-DAC (2014)
Andreas Krinke, Goeran Jerke, Jens Lienig
Adaptive data model for efficient constraint handling in AMS IC design. ICECS (2013)
Robert Fischbach, Johann Knechtel, Jens Lienig
Utilizing 2D and 3D rectilinear blocks for efficient IP reuse and floorplanning of 3D-integrated systems. ISPD (2013)
Jens Lienig
Electromigration and its impact on physical design in future technologies. ISPD (2013)
Andreas Krinke, Maximilian Mittag, Göran Jerke, Jens Lienig
Extended constraint management for analog and mixed-signal IC design. ECCTD (2013)
Thomas Bödrich, Fabian Ehle, Michael Süßenbecker, Jens Lienig
Novel moving-magnet electrodynamic feed units for small machine tools. Prod. Eng. 7 (5) (2013)
Johann Knechtel, Igor L. Markov, Jens Lienig, Matthias Thiele
Multiobjective optimization of deadspace, a critical resource for 3D-IC integration. ICCAD (2012)
Johann Knechtel, Igor L. Markov, Jens Lienig
Assembling 2-D Blocks Into 3-D Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (2) (2012)
Tilo Meister, Jens Lienig, Gisbert Thomke
Interface optimization for improved routability in chip-package-board co-design. SLIP (2011)
Robert Fischbach, Jens Lienig, Johann Knechtel
Investigating modern layout representations for improved 3d design automation. ACM Great Lakes Symposium on VLSI (2011)
Andreas Krinke, Jens Lienig
An ontology for constraints in custom IC design. ECCTD (2011)
Johann Knechtel, Igor L. Markov, Jens Lienig
Assembling 2D blocks into 3D chips. ISPD (2011)
Göran Jerke, Jens Lienig
Early-stage determination of current-density criticality in interconnects. ISQED (2010)
Peter Schneider, Andy Heinig, Robert Fischbach, Jens Lienig, Sven Reitz, Jörn Stolle, Andreas Wilde
Integration of multi physics modeling of 3D stacks into modern 3D data structures. 3DIC (2010)
Robert Fischbach, Jens Lienig, Matthias Thiele
Solution space investigation and comparison of modern data structures for heterogeneous 3D designs. 3DIC (2010)
Göran Jerke, Jens Lienig
Constraint-driven design: the next step towards analog design automation. ISPD (2009)
Robert Fischbach, Jens Lienig, Tilo Meister
From 3D circuit technologies and data structures to interconnect prediction. SLIP (2009)
Ammar Nassaj, Jens Lienig, Goeran Jerke
A new methodology for constraint-driven layout design of analog circuits. ICECS (2009)
Tilo Meister, Jens Lienig, Gisbert Thomke
Novel Pin Assignment Algorithms for Components with Very High Pin Counts. DATE (2008)
Ammar Nassaj, Jens Lienig, Göran Jerke
A constraint-driven methodology for placement of analog and mixed-signal integrated circuits. ICECS (2008)
Tilo Meister, Jens Lienig, Gisbert Thomke
Universal Methodology to Handle Differential Pairs during Pin Assignment. VLSI-SoC (Selected Papers) (2008)
Jens Lienig
introduction to electromigration-aware physical design. ISPD (2006)
Jens Lienig, Göran Jerke
Electromigration-Aware Physical Design of Integrated Circuits. VLSI Design (2005)
Jens Lienig
Interconnect and current density stress: an introduction to electromigration-aware design. SLIP (2005)
Goeran Jerke, Jens Lienig, Jürgen Scheible
Reliability-driven layout decompaction for electromigration failure avoidance in complex mixed-signal IC designs. DAC (2004)
Göran Jerke, Jens Lienig
Hierarchical current-density verification in arbitrarily shaped metallization patterns of analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (1) (2004)
Jens Lienig, Göran Jerke
Current-driven wire planning for electromigration avoidance in analog circuits. ASP-DAC (2003)
Goeran Jerke, Jens Lienig
Hierarchical Current Density Verification for Electromigration Analysis in Arbitrary Shaped Metallization Patterns of Analog Circuits. DATE (2002)
Jens Lienig, Goeran Jerke, Thorsten Adler
Electromigration Avoidance in Analog Circuits: Two Methodologies for Current-Driven Routing. VLSI Design (2002)
Jens Lienig, Goeran Jerke, Thorsten Adler
AnalogRouter: a new approach of current-driven routing for analog circuits. DATE (2001)
Jens Lienig
A parallel genetic algorithm for performance-driven VLSI routing. IEEE Trans. Evol. Comput. 1 (1) (1997)
Jens Lienig
Channel and Switchbox Routing with Minimized Crosstalk - A Parallel Genetic Algorithm Approach. VLSI Design (1997)
Jens Lienig, James P. Cohoon
Genetic Algorithms Applied to the Physical Design of VLSI Circuits: A Survey. PPSN (1996)
Jens Lienig, Krishnaiyan Thulasiraman
Gasbor: a Genetic Algorithm Approach for Solving the switchbox Routing Problem. J. Circuits Syst. Comput. 6 (4) (1996)
Jens Lienig, Krishnaiyan Thulasiraman
A New Genetic Algorithm for the Channel Routing Problem. VLSI Design (1994)
Jens Lienig, Holger Brandt
An Evolutionary Algorithm for the Routing of Multi-Chip Modules. PPSN (1994)
Jens Lienig, Krishnaiyan Thulasiraman
GASBOR: A Genetic Algorithm for Switchbox Routing in Integrated Circuits. Evo Workshops (1994)
Jens Lienig, Krishnaiyan Thulasiraman
A Genetic Algorithm for Channel Routing in VLSI Circuits. Evol. Comput. 1 (4) (1993)
Jens Lienig, Krishnaiyan Thulasiraman, M. N. S. Swamy
Routing algorithms for multi-chip modules. EURO-DAC (1992)

Jens Lienig.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Jens Lienig