Johann Knechtel

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 86

Top Topics

Design Automation

Graph Isomorphism

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Jitendra Bhandari, Mohammed Thari Nabeel, Likhitha Mankali, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel
Lightweight Masking Against Static Power Side-Channel Attacks. CoRR (2024)
Saideep Sreekumar, Mohammed Ashraf, Mohammed Thari Nabeel, Ozgur Sinanoglu, Johann Knechtel
X-Volt: Joint Tuning of Driver Strengths and Supply Voltages Against Power Side-Channel Attacks. ISPD (2023)
Lilas Alrahis, Likhitha Mankali, Satwik Patnaik, Abhrajit Sengupta, Johann Knechtel, Ozgur Sinanoglu
UN-SPLIT: Attacking Split Manufacturing Using Link Prediction in Graph Neural Networks. SPACE (2023)
Animesh Basak Chowdhury, Lilas Alrahis, Luca Collini, Johann Knechtel, Ramesh Karri, Siddharth Garg, Ozgur Sinanoglu, Benjamin Tan
ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning. DAC (2023)
Jitendra Bhandari, Jayanth Gopinath, Mohammed Ashraf, Johann Knechtel, Ramesh Karri
DEFending Integrated Circuit Layouts. IACR Cryptol. ePrint Arch. 2023 (2023)
Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICs. ASP-DAC (2023)
Likhitha Mankali, Lilas Alrahis, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu
Titan: Security Analysis of Large-Scale Hardware Obfuscation Using Graph Neural Networks. IEEE Trans. Inf. Forensics Secur. 18 (2023)
Hazem Lashen, Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
TrojanSAINT: Gate-Level Netlist Sampling-Based Inductive Learning for Hardware Trojan Detection. CoRR (2023)
Mohammad Eslami, Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri, Samuel Pagliarini
Benchmarking Advanced Security Closure of Physical Layouts: ISPD 2023 Contest. ISPD (2023)
Fangzhou Wang, Qijing Wang, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Lilas Alrahis, Ozgur Sinanoglu, Johann Knechtel, Tsung-Yi Ho, Evangeline F. Y. Young
Security Closure of IC Layouts Against Hardware Trojans. ISPD (2023)
Animesh Basak Chowdhury, Lilas Alrahis, Luca Collini, Johann Knechtel, Ramesh Karri, Siddharth Garg, Ozgur Sinanoglu, Benjamin Tan
ALMOST: Adversarial Learning to Mitigate Oracle-less ML Attacks via Synthesis Tuning. CoRR (2023)
Likhitha Mankali, Satwik Patnaik, Nimisha Limaye, Johann Knechtel, Ozgur Sinanoglu
VIGILANT: Vulnerability Detection Tool Against Fault-Injection Attacks for Locking Techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Hazem Lashen, Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
TrojanSAINT: Gate-Level Netlist Sampling-Based Inductive Learning for Hardware Trojan Detection. ISCAS (2023)
Jitendra Bhandari, Likhitha Mankali, Mohammed Nabeel, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel
Beware Your Standard Cells! On Their Role in Static Power Side-Channel Attacks. IACR Cryptol. ePrint Arch. 2023 (2023)
Gino A. Chacon, Charles Williams, Johann Knechtel, Ozgur Sinanoglu, Paul V. Gratz
Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems. CoRR (2022)
Fangzhou Wang, Qijing Wang, Bangqi Fu, Shui Jiang, Xiaopeng Zhang, Lilas Alrahis, Ozgur Sinanoglu, Johann Knechtel, Tsung-Yi Ho, Evangeline F. Y. Young
Security Closure of IC Layouts Against Hardware Trojans. CoRR (2022)
Abhrajit Sengupta, Mohammed Nabeel, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
A New Paradigm in Split Manufacturing: Lock the FEOL, Unlock at the BEOL. Cryptogr. 6 (2) (2022)
Lilas Alrahis, Johann Knechtel, Florian Klemme, Hussam Amrouch, Ozgur Sinanoglu
GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
Graph Neural Networks: A Powerful and Versatile Tool for Advancing Design, Reliability, and Security of ICs. CoRR (2022)
Shaza Elsharief, Lilas Alrahis, Johann Knechtel, Ozgur Sinanoglu
IsoLock: Thwarting Link-Prediction Attacks on Routing Obfuscation by Graph Isomorphism. IACR Cryptol. ePrint Arch. 2022 (2022)
Nikhil Rangarajan, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Shubham Rai, Gopal Raut, Heba Abunahla, Baker Mohammad, Santosh Kumar Vishvakarma, Akash Kumar, Johann Knechtel, Ozgur Sinanoglu
SCRAMBLE: A Secure and Configurable, Memristor-Based Neuromorphic Hardware Leveraging 3D Architecture. ISVLSI (2022)
Saideep Sreekumar, Mohammed Ashraf, Mohammed Nabeel, Ozgur Sinanoglu, Johann Knechtel
X-Volt: Joint Tuning of Driver Strengths and Supply Voltages Against Power Side-Channel Attacks. CoRR (2022)
Lilas Alrahis, Abhrajit Sengupta, Johann Knechtel, Satwik Patnaik, Hani H. Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu
GNN-RE: Graph Neural Networks for Reverse Engineering of Gate-Level Netlists. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (8) (2022)
Nikhil Rangarajan, Johann Knechtel, Nimisha Limaye, Ozgur Sinanoglu, Hussam Amrouch
A Novel Attack Mode on Advanced Technology Nodes Exploiting Transistor Self-Heating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Johann Knechtel, Tarek Ashraf, Natascha Fernengel, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Ozgur Sinanoglu, Hussam Amrouch
Design-time exploration of voltage switching against power analysis attacks in 14 nm FinFET technology. Integr. 85 (2022)
Gino A. Chacon, Charles Williams, Johann Knechtel, Ozgur Sinanoglu, Paul V. Gratz
Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems. IEEE Comput. Archit. Lett. 21 (2) (2022)
Satwik Patnaik, Mohammed Ashraf, Haocheng Li, Johann Knechtel, Ozgur Sinanoglu
Concerted Wire Lifting: Enabling Secure and Cost-Effective Split Manufacturing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (2) (2022)
Shubham Rai, Satwik Patnaik, Ansh Rupani, Johann Knechtel, Ozgur Sinanoglu, Akash Kumar
Security Promises and Vulnerabilities in Emerging Reconfigurable Nanotechnology-Based Circuits. IEEE Trans. Emerg. Top. Comput. 10 (2) (2022)
Johann Knechtel, Jayanth Gopinath, Mohammed Ashraf, Jitendra Bhandari, Ozgur Sinanoglu, Ramesh Karri
Benchmarking Security Closure of Physical Layouts: ISPD 2022 Contest. ISPD (2022)
Lilas Alrahis, Johann Knechtel, Florian Klemme, Hussam Amrouch, Ozgur Sinanoglu
GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation. CoRR (2022)
Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ramesh Karri, Ozgur Sinanoglu, Shaloo Rakheja
Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices. IEEE Trans. Emerg. Top. Comput. 10 (1) (2022)
Nikhil Rangarajan, Johann Knechtel, Dinesh Rajasekharan, Ozgur Sinanoglu
SuperVAULT: Superparamagnetic Volatile Auxiliary Tamper-Proof Storage. IEEE Embed. Syst. Lett. 14 (2) (2022)
Jens Lienig, Susann Rothe, Matthias Thiele, Nikhil Rangarajan, Mohammed Ashraf, Mohammed Nabeel, Hussam Amrouch, Ozgur Sinanoglu, Johann Knechtel
Toward Security Closure in the Face of Reliability Effects ICCAD Special Session Paper. ICCAD (2021)
Tapojyoti Mandal, Gino Chacon, Johann Knechtel, Ozgur Sinanoglu, Paul Gratz, Vassos Soteriou
Interposer-Based Root of Trust. CoRR (2021)
Johann Knechtel, Jayanth Gopinath, Jitendra Bhandari, Mohammed Ashraf, Hussam Amrouch, Shekhar Borkar, Sung-Kyu Lim, Ozgur Sinanoglu, Ramesh Karri
Security Closure of Physical Layouts ICCAD Special Session Paper. ICCAD (2021)
Lilas Alrahis, Satwik Patnaik, Johann Knechtel, Hani H. Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu
UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking. IEEE Trans. Inf. Forensics Secur. 16 (2021)
Johann Knechtel
Hardware Security for and beyond CMOS Technology. ISPD (2021)
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
A Modern Approach to IP Protection and Trojan Prevention: Split Manufacturing for 3D ICs and Obfuscation of Vertical Interconnects. IEEE Trans. Emerg. Top. Comput. 9 (4) (2021)
Haocheng Li, Satwik Patnaik, Mohammed Ashraf, Haoyu Yang, Johann Knechtel, Bei Yu, Ozgur Sinanoglu, Evangeline F. Y. Young
Deep Learning Analysis for Split-Manufactured Layouts With Routing Perturbation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (10) (2021)
Johann Knechtel, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Yogesh Singh Chauhan, Jörg Henkel, Ozgur Sinanoglu, Hussam Amrouch
Power Side-Channel Attacks in Negative Capacitance Transistor (NCFET). CoRR (2020)
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Johann Knechtel, Elif Bilge Kavun, Francesco Regazzoni, Annelie Heuser, Anupam Chattopadhyay, Debdeep Mukhopadhyay, Soumyajit Dey, Yunsi Fei, Yaacov Belenky, Itamar Levi, Tim Güneysu, Patrick Schaumont, Ilia Polian
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. DATE (2020)
Johann Knechtel, Satwik Patnaik, Mohammed Nabeel, Mohammed Ashraf, Yogesh Singh Chauhan, Jörg Henkel, Ozgur Sinanoglu, Hussam Amrouch
Power Side-Channel Attacks in Negative Capacitance Transistor. IEEE Micro 40 (6) (2020)
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging. CoRR (2020)
Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
SMART: A Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory. IEEE Access 8 (2020)
Mohammed Nabeel, Mohammed Ashraf, Satwik Patnaik, Vassos Soteriou, Ozgur Sinanoglu, Johann Knechtel
2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets. IEEE Trans. Computers 69 (11) (2020)
Johann Knechtel, Elif Bilge Kavun, Francesco Regazzoni, Annelie Heuser, Anupam Chattopadhyay, Debdeep Mukhopadhyay, Soumyajit Dey, Yunsi Fei, Yaacov Belenky, Itamar Levi, Tim Güneysu, Patrick Schaumont, Ilia Polian
Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. CoRR (2020)
Johann Knechtel
Hardware Security For and Beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges. ISPD (2020)
Johann Knechtel
Hardware Security for and beyond CMOS Technology: An Overview on Fundamentals, Applications, and Challenges. CoRR (2020)
Mohammed Nabeel, Mohammed Ashraf, Satwik Patnaik, Vassos Soteriou, Ozgur Sinanoglu, Johann Knechtel
2.5D Root of Trust: Secure System-Level Integration of Untrusted Chiplets. CoRR (2020)
Lilas Alrahis, Satwik Patnaik, Johann Knechtel, Hani H. Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu
UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking. CoRR (2020)
Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (8) (2020)
Haocheng Li, Satwik Patnaik, Abhrajit Sengupta, Haoyu Yang, Johann Knechtel, Bei Yu, Evangeline F. Y. Young, Ozgur Sinanoglu
Attacking Split Manufacturing from a Deep Learning Perspective. CoRR (2020)
Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
3D Integration: Another Dimension Toward Hardware Security. CoRR (2019)
Johann Knechtel, Jacek Gosciniak, Alabi Bojesomo, Satwik Patnaik, Ozgur Sinanoglu, Mahmoud Rasras
Toward Physically Unclonable Functions from Plasmonics-Enhanced Silicon Disc Resonators. CoRR (2019)
Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
Spin-Based Reconfigurable Logic for Power- and Area-Efficient Applications. IEEE Des. Test 36 (3) (2019)
Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
3D Integration: Another Dimension Toward Hardware Security. IOLTS (2019)
Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
SMART: Secure Magnetoelectric AntifeRromagnet-Based Tamper-Proof Non-Volatile Memory. CoRR (2019)
Abhrajit Sengupta, Mohammed Thari Nabeel, Johann Knechtel, Ozgur Sinanoglu
A New Paradigm in Split Manufacturing: Lock the FEOL, Unlock at the BEOL. CoRR (2019)
Abhrajit Sengupta, Mohammed Nabeel, Johann Knechtel, Ozgur Sinanoglu
A New Paradigm in Split Manufacturing: Lock the FEOL, Unlock at the BEOL. DATE (2019)
Haocheng Li, Satwik Patnaik, Abhrajit Sengupta, Haoyu Yang, Johann Knechtel, Bei Yu, Evangeline F. Y. Young, Ozgur Sinanoglu
Attacking Split Manufacturing from a Deep Learning Perspective. DAC (2019)
Mohammed Nabeel, Mohammed Ashraf, Satwik Patnaik, Vassos Soteriou, Ozgur Sinanoglu, Johann Knechtel
An Interposer-Based Root of Trust: Seize the Opportunity for Secure System-Level Integration of Untrusted Chiplets. CoRR (2019)
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
A Modern Approach to IP Protection and Trojan Prevention: Split Manufacturing for 3D ICs and Obfuscation of Vertical Interconnects. CoRR (2019)
Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime. CoRR (2019)
Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
Protect Your Chip Design Intellectual Property: An Overview. CoRR (2019)
Johann Knechtel, Satwik Patnaik, Ozgur Sinanoglu
Protect Your Chip Design Intellectual Property: An Overview. COINS (2019)
Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Ozgur Sinanoglu
Concerted Wire Lifting: Enabling Secure and Cost-Effective Split Manufacturing. CoRR (2018)
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
Best of both worlds: integration of split manufacturing and camouflaging into a security-driven CAD flow for 3D ICs. ICCAD (2018)
Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
Advancing hardware security using polymorphic and stochastic spin-hall effect devices. DATE (2018)
Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Ozgur Sinanoglu
Concerted wire lifting: Enabling secure and cost-effective split manufacturing. ASP-DAC (2018)
Satwik Patnaik, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
Raise Your Game for Split Manufacturing: Restoring the True Functionality Through BEOL. CoRR (2018)
Johann Knechtel, Jens Lienig, Ibrahim Abe M. Elfadel
Multi-Objective 3D Floorplanning with Integrated Voltage Assignment. ACM Trans. Design Autom. Electr. Syst. 23 (2) (2018)
Nikhil Rangarajan, Satwik Patnaik, Johann Knechtel, Ramesh Karri, Ozgur Sinanoglu, Shaloo Rakheja
Opening the Doors to Dynamic Camouflaging: Harnessing the Power of Polymorphic Devices. CoRR (2018)
Satwik Patnaik, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
Raise your game for split manufacturing: restoring the true functionality through BEOL. DAC (2018)
Satwik Patnaik, Nikhil Rangarajan, Johann Knechtel, Ozgur Sinanoglu, Shaloo Rakheja
Advancing Hardware Security Using Polymorphic and Stochastic Spin-Hall Effect Devices. CoRR (2018)
Sergii Osmolovskyi, Johann Knechtel, Igor L. Markov, Jens Lienig
Optimal die placement for interposer-based 3D ICs. ASP-DAC (2018)
Satwik Patnaik, Mohammed Ashraf, Ozgur Sinanoglu, Johann Knechtel
Best of Both Worlds: Integration of Split Manufacturing and Camouflaging into a Security-Driven CAD Flow for 3D ICs. CoRR (2018)
Johann Knechtel, Ozgur Sinanoglu
On Mitigation of Side-Channel Attacks in 3D ICs: Decorrelating Thermal Patterns from Power and Activity. DAC (2017)
Abhrajit Sengupta, Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Siddharth Garg, Ozgur Sinanoglu
Rethinking Split Manufacturing: An Information-Theoretic Approach with Secure Layout Techniques. CoRR (2017)
Abhrajit Sengupta, Satwik Patnaik, Johann Knechtel, Mohammed Ashraf, Siddharth Garg, Ozgur Sinanoglu
Rethinking split manufacturing: An information-theoretic approach with secure layout techniques. ICCAD (2017)
Satwik Patnaik, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging. CoRR (2017)
Johann Knechtel, Ozgur Sinanoglu, Ibrahim Abe M. Elfadel, Jens Lienig, Cliff C. N. Sze
Large-Scale 3D Chips: Challenges and Solutions for Design Automation, Testing, and Trustworthy Integration. IPSJ Trans. Syst. LSI Des. Methodol. 10 (2017)
Satwik Patnaik, Mohammed Ashraf, Johann Knechtel, Ozgur Sinanoglu
Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging. ICCAD (2017)
Johann Knechtel, Ozgur Sinanoglu
On Mitigation of Side-Channel Attacks in 3D ICs: Decorrelating Thermal Patterns from Power and Activity. CoRR (2017)
Johann Knechtel, Jens Lienig
Physical Design Automation for 3D Chip Stacks: Challenges and Solutions. ISPD (2016)
Johann Knechtel, Evangeline F. Y. Young, Jens Lienig
Planning Massive Interconnects in 3-D Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (11) (2015)
Johann Knechtel, Evangeline F. Y. Young, Jens Lienig
Structural planning of 3D-IC interconnects by block alignment. ASP-DAC (2014)
Puskar Budhathoki, Johann Knechtel, Andreas Henschel, Ibrahim Abe M. Elfadel
Integration of thermal management and floorplanning based on three-dimensional layout representations. ICECS (2013)
Robert Fischbach, Johann Knechtel, Jens Lienig
Utilizing 2D and 3D rectilinear blocks for efficient IP reuse and floorplanning of 3D-integrated systems. ISPD (2013)
Johann Knechtel, Igor L. Markov, Jens Lienig, Matthias Thiele
Multiobjective optimization of deadspace, a critical resource for 3D-IC integration. ICCAD (2012)
Johann Knechtel, Igor L. Markov, Jens Lienig
Assembling 2-D Blocks Into 3-D Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (2) (2012)
Robert Fischbach, Jens Lienig, Johann Knechtel
Investigating modern layout representations for improved 3d design automation. ACM Great Lakes Symposium on VLSI (2011)
Johann Knechtel, Igor L. Markov, Jens Lienig
Assembling 2D blocks into 3D chips. ISPD (2011)