Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging.
Satwik PatnaikMohammed AshrafOzgur SinanogluJohann KnechtelPublished in: CoRR (2020)
Keyphrases
- low cost
- lower cost
- low power
- power dissipation
- cmos technology
- single chip
- input output
- hardware and software
- digital camera
- low power consumption
- real time
- data acquisition
- embedded systems
- layout design
- genetic algorithm
- reconfigurable hardware
- cf loadingtexthtml
- power consumption
- high speed
- evolutionary algorithm
- chip design