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Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging.
Satwik Patnaik
Mohammed Ashraf
Ozgur Sinanoglu
Johann Knechtel
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2020)
Keyphrases
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low cost
lower cost
low power
power dissipation
cmos technology
hardware and software
single chip
input output
low power consumption
real time
data acquisition
high speed
highly efficient
neural network
layout design
digital camera
embedded systems
fiber optic
reconfigurable hardware
digital images