Göran Jerke

Publication Activity (10 Years)

Years Active: 2003-2022
Publications (10 Years): 4

Top Topics

Integrated Circuit

Minimum Description Length

Top Venues

Publications

A. Hirler, U. Abelein, M. Büttner, Ricarda Fischbach, Göran Jerke, Andreas Krinke, S. Simon
Mission Profile Clustering Using a Universal Quantile Criterion. IRPS (2022)
Steve Bigalke, Jens Lienig, Göran Jerke, Jürgen Scheible, Roland Jancke
The need and opportunities of electromigration-aware integrated circuit design. ICCAD (2018)
Daniel Marolt, Jürgen Scheible, Göran Jerke, Vinko Marolt
SWARM: A Multi-agent System for Layout Automation in Analog Integrated Circuit Design. KES-AMSTA (2016)
Daniel Marolt, Jürgen Scheible, Göran Jerke, Vinko Marolt
Analog layout automation via self-organization: Enhancing the novel SWARM approach. LASCAS (2016)
Volker Meyer zu Bexten, Markus Tristl, Göran Jerke, Hartmut Marquardt, Dina Medhat
Physical verification flow for hierarchical analog ic design constraints. ASP-DAC (2015)
Andreas Krinke, Maximilian Mittag, Göran Jerke, Jens Lienig
Extended constraint management for analog and mixed-signal IC design. ECCTD (2013)
Maximilian Mittag, Andreas Krinke, Göran Jerke, Wolfgang Rosenstiel
Hierarchical propagation of geometric constraints for full-custom physical design of ICs. DATE (2012)
Göran Jerke, Jens Lienig
Early-stage determination of current-density criticality in interconnects. ISQED (2010)
Göran Jerke, Jens Lienig
Constraint-driven design: the next step towards analog design automation. ISPD (2009)
Ammar Nassaj, Jens Lienig, Göran Jerke
A constraint-driven methodology for placement of analog and mixed-signal integrated circuits. ICECS (2008)
Jan B. Freuer, Göran Jerke, Joachim Gerlach, Wolfgang Nebel
On the Verification of High-Order Constraint Compliance in IC Design. DATE (2008)
Jens Lienig, Göran Jerke
Electromigration-Aware Physical Design of Integrated Circuits. VLSI Design (2005)
Göran Jerke, Jens Lienig
Hierarchical current-density verification in arbitrarily shaped metallization patterns of analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (1) (2004)
Jens Lienig, Göran Jerke
Current-driven wire planning for electromigration avoidance in analog circuits. ASP-DAC (2003)