Wei Zhang

ORCID

Publication Activity (10 Years)

Years Active: 2001-2021
Publications (10 Years): 39

Top Venues

Publications

Hao Wen, Wei Zhang
Cache Leakage Reduction Techniques for Hybrid SPM-Cache Architectures. J. Circuits Syst. Comput. 30 (1) (2021)
Hao Wen, Wei Zhang
Denial of Service in CPU-GPU Heterogeneous Architectures. HPEC (2020)
Xin Wang, Wei Zhang
Cracking Randomized Coalescing Techniques with An Efficient Profiling-Based Side-Channel Attack to GPU. HASP@ISCA (2019)
Hao Wen, Wei Zhang
Improving Parallelism of Breadth First Search (BFS) Algorithm for Accelerated Performance on GPUs. HPEC (2019)
Xin Wang, Wei Zhang
Execution Units Power-Gating to Improve Energy Efficiency of GPGPUs. iThings/GreenCom/CPSCom/SmartData (2019)
Xin Wang, Wei Zhang
An Efficient Profiling-Based Side-Channel Attack on Graphics Processing Units. NCS (2019)
Hao Wen, Wei Zhang
Heterogeneous Cache Hierarchy Management for Integrated CPU-GPU Architecture. HPEC (2019)
Hangjun Che, Jun Wang, Wei Zhang
A Collaborative Neurodynamic Approach to Sparse Coding. ISNN (1) (2019)
Lan Wu, Wei Zhang
Cache-Aware SPM Allocation Algorithms for Performance and Energy Optimization on Hybrid SPM-Cache Architecture. J. Comput. Sci. Eng. 12 (3) (2018)
Hao Wen, Wei Zhang
Exploring GPU Data Cache Leakage Management Techniques. J. Comput. Sci. Eng. 12 (3) (2018)
Yijie Huangfu, Wei Zhang
WCET Analysis of GPU L1 Data Caches. HPEC (2018)
Hao Wen, Wei Zhang
Reducing Inter-Application Interferences in Integrated CPU-GPU Heterogeneous Architecture. ICCD (2018)
Hao Wen, Wei Zhang
Regression Based WCET Analysis For Sampling Based Motion Planning. HPEC (2018)
Xin Wang, Wei Zhang
Improving CPU and GPU Performance through Sample-Based Dynamic LLC Bypassing. J. Comput. Sci. Eng. 12 (2) (2018)
Hao Wen, Wei Zhang
Exploiting GPU with 3D Stacked Memory to Boost Performance for Data-Intensive Applications. HPEC (2018)
Yijie Huangfu, Wei Zhang
Estimating the Worst-Case Execution Time of the Shared Data Cache in Integrated CPU-GPU Architectures. J. Comput. Sci. Eng. 12 (4) (2018)
Lan Wu, Wei Zhang
Cache-Aware SPM Allocation to Reduce Worst-Case Execution Time for Hybrid SPM-Caches. J. Circuits Syst. Comput. 27 (5) (2018)
Xin Wang, Wei Zhang
Packing Narrow-Width Operands to Improve GPU Performance. J. Comput. Sci. Eng. 12 (2) (2018)
Xin Wang, Wei Zhang
Energy-Efficient DNN Computing on GPUs Through Register File Management. HPEC (2018)
Yijie Huangfu, Wei Zhang
Leakage energy reduction for hard real-time caches. HPEC (2017)
Yijie Huangfu, Wei Zhang
Static WCET Analysis of GPUs with Predictable Warp Scheduling. ISORC (2017)
Yijie Huangfu, Wei Zhang
WCET analysis of the shared data cache in integrated CPU-GPU architectures. HPEC (2017)
Yijie Huangfu, Wei Zhang
Enhancing GPU Performance by Efficient Hardware-Based and Hybrid L1 Data Cache Bypassing. J. Comput. Sci. Eng. 11 (2) (2017)
Xin Wang, Wei Zhang
A Sample-Based Dynamic CPU and GPU LLC Bypassing Method for Heterogeneous CPU-GPU Architectures. TrustCom/BigDataSE/ICESS (2017)
Xin Wang, Wei Zhang
GPU Register Packing: Dynamically Exploiting Narrow-Width Operands to Improve Performance. TrustCom/BigDataSE/ICESS (2017)
Yijie Huangfu, Wei Zhang
Warp-Based Load/Store Reordering to Improve GPU Time Predictability. J. Comput. Sci. Eng. 11 (2) (2017)
Xin Wang, Wei Zhang
Drowsy Register Files for Reducing GPU Leakage Energy. ICPADS (2017)
Yijie Huangfu, Wei Zhang
Warp-Based Load/Store Reordering to Improve GPU Data Cache Time Predictability and Performance. ISORC (2016)
Xin Wang, Wei Zhang
Cache locking vs. partitioning for real-time computing on integrated CPU-GPU processors. IPCCC (2016)
Jun Yan, Wei Zhang
Priority L2 cache design for time predictability. Int. J. Embed. Syst. 8 (5/6) (2016)
Yijie Huangfu, Wei Zhang
Real-Time GPU Computing: Cache or No Cache? ISORC (2015)
Yu Liu, Wei Zhang
Scratchpad Memory Architectures and Allocation Algorithms for Hard Real-Time Multicore Processors. J. Comput. Sci. Eng. 9 (2) (2015)
Lan Wu, Wei Zhang
Cache-aware SPM allocation algorithms for hybrid SPM-cache architectures. ISQED (2015)
Yijie Huangfu, Wei Zhang
Hardware-Based Performance Enhancement Guaranteed Caches. ISORC (2015)
Hao Wen, Wei Zhang
Exploring shared memory and cache to improve GPU performance and energy efficiency. ISQED (2015)
Yijie Huangfu, Wei Zhang
Hardware-Based and Hybrid L1 Data Cache Bypassing to Improve GPU Performance. HPCC/CSS/ICESS (2015)
Yijie Huangfu, Wei Zhang
Boosting GPU Performance by Profiling-Based L1 Data Cache Bypassing. CCGRID (2015)
Yiqiang Ding, Wei Zhang
Exploiting Static Non-Uniform Cache Architectures for Hard Real-Time Computing. J. Comput. Sci. Eng. 9 (4) (2015)
Yijie Huangfu, Wei Zhang
Profiling-based L1 data cache bypassing to improve GPU performance and energy efficiency. SIGBED Rev. 12 (1) (2015)
Yijie Huangfu, Wei Zhang
Worst-case performance guaranteed data cache. IPCCC (2014)
Lan Wu, Yiqiang Ding, Wei Zhang
Comparing Separate and Statically-Partitioned Caches for Time-Predictable Multicore Processors. J. Comput. Sci. Eng. 8 (1) (2014)
Yu Liu, Wei Zhang
Two-Level Scratchpad Memory Architectures to Achieve Time Predictability and High Performance. J. Comput. Sci. Eng. 8 (4) (2014)
Yiqiang Ding, Wei Zhang
WCET analysis of static NUCA caches. IPCCC (2014)
Wei Zhang, Lan Wu
Exploiting Hybrid SPM-Cache Architectures to Reduce Energy Consumption for Embedded Computing. HPCC/CSS/ICESS (2014)
Matthew Loach, Wei Zhang
Performance Implication of Multicore Cache Locking on General-Purpose Processors. HPCC/CSS/ICESS (2014)
Yijie Huangfu, Wei Zhang
PEG-C: Performance Enhancement Guaranteed Cache for Hard Real-Time Systems. IEEE Embed. Syst. Lett. 6 (2) (2014)
Lan Wu, Yiqiang Ding, Wei Zhang
Characterizing Energy Consumption of Real-Time and Media Benchmarks on Hybrid SPM-Caches. HPCC/CSS/ICESS (2014)
Wei Zhang, Yiqiang Ding
Exploiting Standard Deviation of CPI to Evaluate Architectural Time-Predictability. J. Comput. Sci. Eng. 8 (1) (2014)
Hao Wen, Wei Zhang
Reducing cache leakage energy for hybrid SPM-cache architectures. CASES (2014)
Yiqiang Ding, Wei Zhang
Bounding the Worst-Case Execution Time of Static NUCA Caches. HPCC/CSS/ICESS (2014)
Yijie Huangfu, Wei Zhang
Compiler-directed leakage energy reduction for instruction scratch-pad memories. ISQED (2014)
Yijie Huangfu, Wei Zhang
A Real-Time Instruction Cache with High Average-Case Performance. ISORC (2014)
Yu Sun, Wei Zhang
Improving Energy Efficiency with Dynamic Compiler-Directed Function Unit Power Control. EUC (2014)
Yiqiang Ding, Wei Zhang
Hop-Based Priority Scheduling to Improve Worst-Case Inter-core Communication Latency. EUC (2014)
Wei Zhang
Defend GPUs against DoS attacks. IPCCC (2013)
Yijie Huangfu, Wei Zhang
Compiler-based approach to reducing leakage energy of instruction scratch-pad memories. ICCD (2013)
Yu Sun, Wei Zhang
Overview of Real-Time Java Computing. J. Comput. Sci. Eng. 7 (2) (2013)
Yiqiang Ding, Wei Zhang
Multicore Real-Time Scheduling to Reduce Inter-Thread Cache Interferences. J. Comput. Sci. Eng. 7 (1) (2013)
Yiqiang Ding, Wei Zhang
On the interactions between real-time scheduling and inter-thread cached interferences for multicore processors. ISQED (2013)
Wei Zhang, Yiqiang Ding
Standard deviation of CPI: A new metric to evaluate architectural time predictability. ASAP (2013)
Lan Wu, Wei Zhang
Reducing worst-case execution time of hybrid SPM-caches. IPCCC (2013)
Yu Liu, Wei Zhang
Static worst-case lifetime estimation of wireless sensor networks: A case study on VigilNet. J. Syst. Archit. 59 (4-5) (2013)
Yiqiang Ding, Lan Wu, Wei Zhang
Bounding Worst-Case DRAM Performance on Multicore Processors. J. Comput. Sci. Eng. 7 (1) (2013)
Yiqiang Ding, Wei Zhang
Counter-Based Approaches for Efficient WCET Analysis of Multicore Processors with Shared Caches. J. Comput. Sci. Eng. 7 (4) (2013)
Wei Zhang, Yiqiang Ding
Hybrid SPM-cache architectures to achieve high time predictability and performance. ASAP (2013)
Yiqiang Ding, Wei Zhang
Architectural time-predictability factor (ATF): a metric to evaluate time predictability of processors. SIGBED Rev. 9 (4) (2012)
Wei Zhang, Jun Yan
Static Timing Analysis of Shared Caches for Multicore Processors. J. Comput. Sci. Eng. 6 (4) (2012)
Yu Liu, Wei Zhang
Exploiting SPM-aware Scheduling on EPIC architectures for high-performance real-time systems. HPEC (2012)
Yu Sun, Wei Zhang
Time-Predictable Java Dynamic Compilation on Multicore Processors. J. Comput. Sci. Eng. 6 (1) (2012)
Yu Liu, Wei Zhang
Exploiting multi-level scratchpad memories for time-predictable multicore computing. ICCD (2012)
Lan Wu, Wei Zhang
A Model Checking Based Approach to Bounding Worst-Case Execution Time for Multicore Processors. ACM Trans. Embed. Comput. Syst. 11 (S2) (2012)
Yu Sun, Wei Zhang
On-line Trace Based Automatic Parallelization of Java Programs on Multicore Platforms. J. Comput. Sci. Eng. 6 (2) (2012)
Yiqiang Ding, Wei Zhang
Multicore-Aware Code Co-Positioning to Reduce WCET on Dual-Core Processors with Shared Instruction Caches. J. Comput. Sci. Eng. 6 (1) (2012)
Wei Zhang
Work in progress - Course development of programming for general-purpose multicore processors. FIE (2011)
Yu Liu, Wei Zhang
Static Worst-Case Lifetime Estimation of Vigil Net. GreenCom (2011)
Yu Liu, Wei Zhang
Stack distance based worst-case instruction cache performance analysis. SAC (2011)
Jun Yan, Wei Zhang
Computing and Reducing Transient Error Propagation in Registers. J. Comput. Sci. Eng. 5 (2) (2011)
Abhishek Pillai, Wei Zhang
Exploiting Instruction Reuse to Improve the Performance of Dual Instruction Execution. J. Circuits Syst. Comput. 20 (5) (2011)
Jun Yan, Wei Zhang
An Interference Matrix Based Approach to Bounding Worst-Case Inter-Thread Cache Interferences and WCET for Multi-Core Processors. J. Comput. Sci. Eng. 5 (2) (2011)
Jun Yan, Wei Zhang
Bounding Worst-Case Performance for Multi-Core Processors with Shared L2 Instruction Caches. J. Comput. Sci. Eng. 5 (1) (2011)
Yu Liu, Wei Zhang
Exploiting time predictable two-level scratchpad memory for real-time systems. SAC (2011)
Yiqiang Ding, Wei Zhang
Multicore-Aware Code Positioning to Improve Worst-Case Performance. ISORC (2011)
Yu Sun, Wei Zhang
On-Line Trace Based Automatic Parallelization of Java Programs on Multicore Platforms. Interaction between Compilers and Computer Architectures (2011)
Shu-Hui Yin, Yufang Liu, Wei Zhang, Ming-Xing Guo, Peng Song
]pyridine. J. Comput. Chem. 31 (10) (2010)
Jun Yan, Wei Zhang
Time-Predictable L2 Cache Design for High-Performance Real-Time Systems. RTCSA (2010)
Wei Zhang
Replica victim caching to improve cache reliability against transient errors. Int. J. High Perform. Syst. Archit. 2 (3/4) (2010)
Satya Mohan Raju Gudidevuni, Wei Zhang
A time-predictable dual-core prototype on FPGA. ACM Southeast Regional Conference (2010)
Jun Yan, Wei Zhang
Design and implementation of hybrid multicore simulators. Int. J. Embed. Syst. 4 (3/4) (2010)
Yiqiang Ding, Wei Zhang
Improving the static real-time scheduling on multicore processors by reducing worst-case inter-thread cache interferences. ACM Southeast Regional Conference (2010)
Yu Liu, Wei Zhang, Kemal Akkaya
Static Worst-Case Energy and Lifetime Estimation of Wireless Sensor Networks. J. Comput. Sci. Eng. 4 (2) (2010)
Yiqiang Ding, Wei Zhang
Loop-Based Instruction Prefetching to Reduce the Worst-Case Execution Time. IEEE Trans. Computers 59 (6) (2010)
Yu Sun, Wei Zhang
Exploiting Multi-core Processors to Improve Time Predictability for Real-Time Java Computing. RTCSA (2009)
Wei Zhang
Computing and Minimizing Cache Vulnerability to Transient Errors. IEEE Des. Test Comput. 26 (2) (2009)
Yu Liu, Wei Zhang, Kemal Akkaya
Static worst-case energy and lifetime estimation of wireless sensor networks. IPCCC (2009)
Yiqiang Ding, Jun Yan, Wei Zhang
Optimizing Instruction Prefetching to Improve Worst-Case Performance for Real-Time Applications. J. Comput. Sci. Eng. 3 (1) (2009)
Yu Liu, Wei Zhang
Bounding Worst-Case Data Cache Performance by Using Stack Distance. J. Comput. Sci. Eng. 3 (4) (2009)
Wei Zhang, Jun Yan
Accurately Estimating Worst-Case Execution Time for Multi-core Processors with Shared Direct-Mapped Instruction Caches. RTCSA (2009)
Wei Zhang
Boosting the Performance of Software-Based Transient Errors Tolerant Techniques through Compiler Optimizations. J. Circuits Syst. Comput. 18 (4) (2009)
Yu Liu, Wei Zhang
Exploiting stack distance to estimate worst-case data cache performance. SAC (2009)
Yu Sun, Wei Zhang
Studying Energy-Oriented Dynamic Optimizations in Java Virtual Machines. J. Circuits Syst. Comput. 18 (1) (2009)

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Publication Activity (10 Years)

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Wei Zhang