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Modeling Soft Errors at the Device and Logic Levels for Combinational Circuits.

Rajaraman RamanarayananVijay DegalahalKrishnan RamakrishnanJungsub KimVijaykrishnan NarayananYuan XieMary Jane IrwinKenan Unlu
Published in: IEEE Trans. Dependable Secur. Comput. (2009)
Keyphrases
  • logic circuits
  • asynchronous circuits
  • logic synthesis
  • digital circuits
  • delay insensitive
  • high speed
  • low power
  • modeling language
  • databases
  • neural network
  • artificial intelligence
  • modal logic
  • lower level
  • tunnel diode