Tao Zhang

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 8

Top Topics

Top Venues

ACM Great Lakes Symposium on VLSI

Publications

Zhe Zhou, Yiqi Chen, Tao Zhang, Yang Wang, Ran Shu, Shuotao Xu, Peng Cheng, Lei Qu, Yongqiang Xiong, Guangyu Sun
Toward CXL-Native Memory Tiering via Device-Side Profiling. CoRR (2024)
Xingchen Li, Zhihang Yuan, Yijin Guan, Guangyu Sun, Tao Zhang, Rongshan Wei, Dimin Niu
Flatfish: A Reinforcement Learning Approach for Application-Aware Address Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Shuo Li, Nong Xiao, Peng Wang, Guangyu Sun, Xiaoyang Wang, Yiran Chen, Hai Helen Li, Jason Cong, Tao Zhang
RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses. IEEE Trans. Computers 68 (2) (2019)
Peng Wang, Shuo Li, Guangyu Sun, Xiaoyang Wang, Yiran Chen, Hai Li, Jason Cong, Nong Xiao, Tao Zhang
RC-NVM: Enabling Symmetric Row and Column Memory Accesses for In-memory Databases. HPCA (2018)
Jishen Zhao, Cong Xu, Tao Zhang, Yuan Xie
BACH: A Bandwidth-Aware Hybrid Cache Hierarchy Design with Nonvolatile Memories. J. Comput. Sci. Technol. 31 (1) (2016)
Zhe Wang, Daniel A. Jiménez, Tao Zhang, Gabriel H. Loh, Yuan Xie
Building a Low Latency, Highly Associative DRAM Cache with the Buffered Way Predictor. SBAC-PAD (2016)
Matthew Poremba, Tao Zhang, Yuan Xie
Fine-granularity tile-level parallelism in non-volatile memory architecture with two-dimensional bank subdivision. DAC (2016)
Ping Chi, Shuangchen Li, Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, Yuan Xie
PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory. ISCA (2016)
Cong Xu, Dimin Niu, Naveen Muralimanohar, Rajeev Balasubramonian, Tao Zhang, Shimeng Yu, Yuan Xie
Overcoming the challenges of crossbar resistive memory architectures. HPCA (2015)
Matthew Poremba, Tao Zhang, Yuan Xie
NVMain 2.0: A User-Friendly Memory Simulator to Model (Non-)Volatile Memory Systems. IEEE Comput. Archit. Lett. 14 (2) (2015)
Qiaosha Zou, Tao Zhang, Cong Xu, Yuan Xie
TSV power supply array electromigration lifetime analysis in 3D ICS. ACM Great Lakes Symposium on VLSI (2014)
Tao Zhang, Ke Chen, Cong Xu, Guangyu Sun, Tao Wang, Yuan Xie
Half-DRAM: A high-bandwidth and low-power DRAM architecture from the rethinking of fine-grained activation. ISCA (2014)
Tao Zhang, Cong Xu, Ke Chen, Guangyu Sun, Yuan Xie
3D-SWIFT: a high-performance 3D-stacked wide IO DRAM. ACM Great Lakes Symposium on VLSI (2014)
Ping Chi, Cong Xu, Tao Zhang, Xiangyu Dong, Yuan Xie
Using multi-level cell STT-RAM for fast and energy-efficient local checkpointing. ICCAD (2014)
Tao Zhang, Matthew Poremba, Cong Xu, Guangyu Sun, Yuan Xie
CREAM: A Concurrent-Refresh-Aware DRAM Memory architecture. HPCA (2014)
Xian Zhang, Chao Zhang, Guangyu Sun, Jia Di, Tao Zhang
An efficient run-time encryption scheme for non-volatile main memory. CASES (2013)
Tao Zhang, Cong Xu, Yuan Xie, Guangyu Sun
Lazy Precharge: An overhead-free method to reduce precharge overhead for memory parallelism improvement of DRAM system. ICCD (2013)
Qiaosha Zou, Tao Zhang, Eren Kursun, Yuan Xie
Thermomechanical stress-aware management for 3D IC designs. DATE (2013)
Shekhar Srikantaiah, Emre Kultursay, Tao Zhang, Mahmut T. Kandemir, Mary Jane Irwin, Yuan Xie
MorphCache: A Reconfigurable Adaptive Multi-level Cache hierarchy. HPCA (2011)
Tao Zhang, Guangyu Sun
Using NEM relay to improve 3DIC cost efficiency. 3DIC (2011)
Tao Zhang, Kui Wang, Yi Feng, Yan Chen, Qun Li, Bing Shao, Jing Xie, Xiaodi Song, Lian Duan, Yuan Xie, Xu Cheng, Youn-Long Lin
A 3D SoC design for H.264 application with on-chip DRAM stacking. 3DIC (2010)
Tao Zhang, Kui Wang, Yi Feng, Xiaodi Song, Lian Duan, Yuan Xie, Xu Cheng, Youn-Long Lin
A customized design of DRAM controller for on-chip 3D DRAM stacking. CICC (2010)
Brent Hollosi, Tao Zhang, Ravi Sankar Parameswaran Nair, Yuan Xie, Jia Di, Scott C. Smith
Investigation and comparison of thermal distribution in synchronous and asynchronous 3D ICs. 3DIC (2009)
Jin Ouyang, Raghuveer Raghavendra, Sibin Mohan, Tao Zhang, Yuan Xie, Frank Mueller
CheckerCore: enhancing an FPGA soft core to capture worst-case execution times. CASES (2009)
Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, Mary Jane Irwin
Arithmetic unit design using 180nm TSV-based 3D stacking technology. 3DIC (2009)