Qiaosha Zou

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 12

Top Topics

Cost Benefit Analysis

Hierarchical Structure

Event Detection

Top Venues

ACM Great Lakes Symposium on VLSI

Publications

Jingfei Chang, Liping Tao, Bo Lyu, Xiangming Zhu, Shanyun Liu, Qiaosha Zou, Hongyang Chen
BAP: Bilateral asymptotic pruning for optimizing CNNs on image tasks. Inf. Sci. 678 (2024)
Yongchuan Dong, Qiaosha Zou, Chuanjin Richard Shi
Augmenting aspect-level sentiment classification with distance-related local context input. J. Supercomput. 79 (10) (2023)
Yanhong Wang, Tianchan Guan, Dimin Niu, Qiaosha Zou, Hongzhong Zheng, C.-J. Richard Shi, Yuan Xie
Accelerating Distributed GNN Training by Codes. IEEE Trans. Parallel Distributed Syst. 34 (9) (2023)
Yanhong Wang, Zihao Zhao, Xu Jin, Haotian Zheng, Maohua Nie, Qiaosha Zou, C.-J. Richard Shi
AutoMap: Automatic Mapping of Neural Networks to Deep Learning Accelerators for Edge Devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (9) (2023)
Zihao Zhao, Yanhong Wang, Qiaosha Zou, Tie Xu, Fangbo Tao, Jiansong Zhang, Xiaoan Wang, C.-J. Richard Shi, Junwen Luo, Yuan Xie
The Spike Gating Flow: A Hierarchical Structure Based Spiking Neural Network for Online Gesture Recognition. CoRR (2022)
Yanhong Wang, Qiaosha Zou, Yanmin Tang, Qing Wang, Jing Ding, Xin Wang, C.-J. Richard Shi
SAIL: A Deep-Learning-Based System for Automatic Gait Assessment From TUG Videos. IEEE Trans. Hum. Mach. Syst. 52 (1) (2022)
Shiwei Liu, Zihao Zhao, Yanhong Wang, Qiaosha Zou, Yiyun Zhang, C.-J. Richard Shi
Systolic-Array Deep-Learning Acceleration Exploring Pattern-Indexed Coordinate-Assisted Sparsity for Real-Time On-Device Speech Processing. ACM Great Lakes Symposium on VLSI (2021)
Xingfa Qiu, Qiaosha Zou, C.-J. Richard Shi
Single-Pass On-Line Event Detection in Twitter Streams. ICMLC (2021)
Haozhe Zhu, Chixiao Chen, Shiwei Liu, Qiaosha Zou, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, C.-J. Richard Shi
A Communication-Aware DNN Accelerator on ImageNet Using In-Memory Entry-Counting Based Algorithm-Circuit-Architecture Co-Design in 65-nm CMOS. IEEE J. Emerg. Sel. Topics Circuits Syst. 10 (3) (2020)
Jishen Zhao, Qiaosha Zou, Yuan Xie
Overview of 3-D Architecture Design Opportunities and Techniques. IEEE Des. Test 34 (4) (2017)
Qiaosha Zou, Eren Kursun, Yuan Xie
Thermomechanical Stress-Aware Management for 3-D IC Designs. IEEE Trans. Very Large Scale Integr. Syst. 25 (9) (2017)
Shuangchen Li, Cong Xu, Qiaosha Zou, Jishen Zhao, Yu Lu, Yuan Xie
Pinatubo: a processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories. DAC (2016)
Qiaosha Zou, Matthew Poremba, Rui He, Wei Yang, Junfeng Zhao, Yuan Xie
Heterogeneous architecture design with emerging 3D and non-volatile memory technologies. ASP-DAC (2015)
Qiaosha Zou, Yuan Xie
Compact models and model standard for 2.5D and 3D integration. SLIP (2014)
Qiaosha Zou, Matt Poremba, Yuan Xie
A cost benefit analysis: The impact of defect clustering on the necessity of pre-bond tests. 3DIC (2014)
Qiaosha Zou, Tao Zhang, Cong Xu, Yuan Xie
TSV power supply array electromigration lifetime analysis in 3D ICS. ACM Great Lakes Symposium on VLSI (2014)
Qiaosha Zou, Dimin Niu, Yan Cao, Yuan Xie
3DLAT: TSV-based 3D ICs crosstalk minimization utilizing Less Adjacent Transition code. ASP-DAC (2014)
Qiaosha Zou, Jia Zhan, Fen Ge, Matt Poremba, Yuan Xie
Designing vertical bandwidth reconfigurable 3D NoCs for many core systems. 3DIC (2014)
Qiaosha Zou, Jing Xie, Yuan Xie
Cost-driven 3D design optimization with metal layer reduction technique. ISQED (2013)
Dimin Niu, Qiaosha Zou, Cong Xu, Yuan Xie
Low power multi-level-cell resistive memory design with incomplete data mapping. ICCD (2013)
Qiaosha Zou, Tao Zhang, Eren Kursun, Yuan Xie
Thermomechanical stress-aware management for 3D IC designs. DATE (2013)
Yibo Chen, Guangyu Sun, Qiaosha Zou, Yuan Xie
3DHLS: Incorporating high-level synthesis in physical planning of three-dimensional (3D) ICs. DATE (2012)
Qiaosha Zou, Yibo Chen, Yuan Xie, Alan Su
System-level design space exploration for three-dimensional (3D) SoCs. CODES+ISSS (2011)