Hongzhong Zheng

Publication Activity (10 Years)

Years Active: 2007-2023
Publications (10 Years): 41

Top Topics

Multichip Module

Service Architecture

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Zhiyao Li, Jiaxiang Li, Taijie Chen, Dimin Niu, Hongzhong Zheng, Yuan Xie, Mingyu Gao
Spada: Accelerating Sparse Matrix Multiplication with Adaptive Dataflow. ASPLOS (2) (2023)
Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie
MPU: Memory-centric SIMT Processor via In-DRAM Near-bank Computing. ACM Trans. Archit. Code Optim. 20 (3) (2023)
Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie
Klotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators. ICCAD (2023)
Zheng Qu, Dimin Niu, Shuangchen Li, Hongzhong Zheng, Yuan Xie
TT-GNN: Efficient On-Chip Graph Neural Network Training via Embedding Reformation and Hardware Optimization. MICRO (2023)
Bizhao Shi, Jiaxi Zhang, Zhuolun He, Xuechao Wei, Sicheng Li, Guojie Luo, Hongzhong Zheng, Yuan Xie
Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (11) (2023)
Yuanwei Fang, Zihao Liu, Yanheng Lu, Jiawei Liu, Jiajie Li, Yi Jin, Jian Chen, Yenkuang Chen, Hongzhong Zheng, Yuan Xie
NPS: A Framework for Accurate Program Sampling Using Graph Neural Network. CoRR (2023)
Yanhong Wang, Tianchan Guan, Dimin Niu, Qiaosha Zou, Hongzhong Zheng, C.-J. Richard Shi, Yuan Xie
Accelerating Distributed GNN Training by Codes. IEEE Trans. Parallel Distributed Syst. 34 (9) (2023)
Chen Bai, Jiayi Huang, Xuechao Wei, Yuzhe Ma, Sicheng Li, Hongzhong Zheng, Bei Yu, Yuan Xie
ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis. MICRO (2023)
Linyong Huang, Zhe Zhang, Shuangchen Li, Dimin Niu, Yijin Guan, Hongzhong Zheng, Yuan Xie
Practical Near-Data-Processing Architecture for Large-Scale Distributed Graph Neural Network. IEEE Access 10 (2022)
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Hongzhong Zheng, Yuan Xie
Accelerating CPU-Based Sparse General Matrix Multiplication With Binary Row Merging. IEEE Access 10 (2022)
Haozhe Zhu, Bo Jiao, Jinshan Zhang, Xinru Jia, Yunzhengmao Wang, Tianchan Guan, Shengcheng Wang, Dimin Niu, Hongzhong Zheng, Chixiao Chen, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, Qi Liu, Yuan Xie, Ming Liu
COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning. ISSCC (2022)
Shuangchen Li, Dimin Niu, Yuhao Wang, Wei Han, Zhe Zhang, Tianchan Guan, Yijin Guan, Heng Liu, Linyong Huang, Zhaoyang Du, Fei Xue, Yuanwei Fang, Hongzhong Zheng, Yuan Xie
Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network. ISCA (2022)
Xingchen Li, Bingzhe Wu, Guangyu Sun, Zhe Zhang, Zhihang Yuan, Runsheng Wang, Ru Huang, Dimin Niu, Hongzhong Zheng, Zhichao Lu, Liang Zhao, Meng-Fan Marvin Chang, Tianchan Guan, Xin Si
Enabling High-Quality Uncertainty Quantification in a PIM Designed for Bayesian Neural Network. HPCA (2022)
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Linyong Huang, Hongzhong Zheng, Yuan Xie
OpSparse: a Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs. CoRR (2022)
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Hongzhong Zheng, Yuan Xie
Accelerating CPU-based Sparse General Matrix Multiplication with Binary Row Merging. CoRR (2022)
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Linyong Huang, Hongzhong Zheng, Yuan Xie
OpSparse: A Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs. IEEE Access 10 (2022)
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, Xiaolang Yan, Yuan Xie
Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio. CoRR (2022)
Zhaoyang Du, Yijin Guan, Tianchan Guan, Dimin Niu, Nianxiong Tan, Xiaopeng Yu, Hongzhong Zheng, Jianyi Meng, Xiaolang Yan, Yuan Xie
Predicting the Output Structure of Sparse Matrix Multiplication with Sampled Compression Ratio. ICPADS (2022)
Linyong Huang, Zhe Zhang, Zhaoyang Du, Shuangchen Li, Hongzhong Zheng, Yuan Xie, Nianxiong Tan
EPQuant: A Graph Neural Network compression approach based on product quantization. Neurocomputing 503 (2022)
Dimin Niu, Shuangchen Li, Yuhao Wang, Wei Han, Zhe Zhang, Yijin Guan, Tianchan Guan, Fei Sun, Fei Xue, Lide Duan, Yuanwei Fang, Hongzhong Zheng, Xiping Jiang, Song Wang, Fengguo Zuo, Yubing Wang, Bing Yu, Qiwei Ren, Yuan Xie
3D Logic-to-DRAM Hybrid Bonding with Process-Near-Memory Engine for Recommendation System. ISSCC (2022)
Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie
MPU: Towards Bandwidth-abundant SIMT Processor via Near-bank Computing. CoRR (2021)
Feng Wang, Guojie Luo, Guang-Yu Sun, Yuhao Wang, Dimin Niu, Hongzhong Zheng
Area Efficient Pattern Representation of Binary Neural Networks on RRAM. J. Comput. Sci. Technol. 36 (5) (2021)
Feng Wang, Guojie Luo, Guangyu Sun, Jiaxi Zhang, Jinfeng Kang, Yuhao Wang, Dimin Niu, Hongzhong Zheng
STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (5) (2021)
Peng Gu, Xinfeng Xie, Shuangchen Li, Dimin Niu, Hongzhong Zheng, Krishna T. Malladi, Yuan Xie
DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (8) (2021)
Zhao Wang, Yijin Guan, Guangyu Sun, Dimin Niu, Yuhao Wang, Hongzhong Zheng, Yinhe Han
GNN-PIM: A Processing-in-Memory Architecture for Graph Neural Networks. ACA (2020)
Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Rachata Ausavarungnirun, Kevin Hsieh, Nastaran Hajinazar, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu
CoNDA: efficient cache coherence support for near-data accelerators. ISCA (2019)
Shuangchen Li, Alvin Oliver Glova, Xing Hu, Peng Gu, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie
SCOPE: A Stochastic Computing Engine for DRAM-Based In-Situ Accelerator. MICRO (2018)
Mu-Tien Chang, I. Stephen Choi, Dimin Niu, Hongzhong Zheng
Performance Impact of Emerging Memory Technologies on Big Data Applications: A Latency-Programmable System Emulation Approach. ACM Great Lakes Symposium on VLSI (2018)
Tyler Stocksdale, Mu-Tien Chang, Hongzhong Zheng, Frank Mueller
Architecting HBM as a high bandwidth, high capacity, self-managed last-level cache. PDSW-DISCS@SC (2017)
Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Nastaran Hajinazar, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu
LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures. CoRR (2017)
Shuangchen Li, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie
DRISA: a DRAM-based reconfigurable in-situ accelerator. MICRO (2017)
Mingyu Gao, Christina Delimitrou, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Christos Kozyrakis
DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric. IEEE Micro 37 (3) (2017)
Amirali Boroumand, Saugata Ghose, Minesh Patel, Hasan Hassan, Brandon Lucia, Kevin Hsieh, Krishna T. Malladi, Hongzhong Zheng, Onur Mutlu
LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory. IEEE Comput. Archit. Lett. 16 (1) (2017)
Krishna T. Malladi, Mu-Tien Chang, Dimin Niu, Hongzhong Zheng
FlashStorageSim: Performance Modeling for SSD Architectures. NAS (2017)
Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng
Software-Defined Emulation Infrastructure for High Speed Storage. SYSTOR (2016)
Mingyu Gao, Christina Delimitrou, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Christos Kozyrakis
DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric. ISCA (2016)
Shaodi Wang, Henry Chaohong Hu, Hongzhong Zheng, Puneet Gupta
MEMRES: A Fast Memory System Reliability Simulator. IEEE Trans. Reliab. 65 (4) (2016)
Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng
DRAMPersist: Making DRAM Systems Persistent. MEMSYS (2016)
Krishna T. Malladi, Manu Awasthi, Hongzhong Zheng
FlexDrive: A Framework to Explore NVMe Storage Solutions. HPCC/SmartCity/DSS (2016)
Krishna T. Malladi, Uksong Kang, Manu Awasthi, Hongzhong Zheng
DRAMScale: Mechanisms to Increase DRAM Capacity. MEMSYS (2016)
Krishna T. Malladi, Mu-Tien Chang, John Ping, Hongzhong Zheng
FAME: A Fast and Accurate Memory Emulator for New Memory System Architecture Exploration. MASCOTS (2015)
Kun Fang, Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu
Mini-Rank: A Power-EfficientDDRx DRAM Memory Architecture. IEEE Trans. Computers 63 (6) (2014)
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang
Thermal Modeling and Management of DRAM Systems. IEEE Trans. Computers 62 (10) (2013)
Hongzhong Zheng, Zhichun Zhu
Power and Performance Trade-Offs in Contemporary DRAM System Designs for Multicore Processors. IEEE Trans. Computers 59 (8) (2010)
Kun Fang, Hongzhong Zheng, Zhichun Zhu
Heterogeneous Mini-rank: Adaptive, Power-Efficient Memory Architecture. ICPP (2010)
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu
Decoupled DIMM: building high-bandwidth memory system using low-speed DRAM devices. ISCA (2009)
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Eugene Gorbatov, Howard David, Zhichun Zhu
Mini-rank: Adaptive DRAM architecture for improving memory power efficiency. MICRO (2008)
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Eugene Gorbatov, Howard David, Zhao Zhang
Software thermal management of dram memory for multicore systems. SIGMETRICS (2008)
Hongzhong Zheng, Jiang Lin, Zhao Zhang, Zhichun Zhu
Memory Access Scheduling Schemes for Systems with Multi-Core Processors. ICPP (2008)
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhang, Howard David
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving. ISPASS (2007)
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Howard David, Zhao Zhang
Thermal modeling and management of DRAM memory systems. ISCA (2007)