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STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization.
Feng Wang
Guojie Luo
Guangyu Sun
Jiaxi Zhang
Jinfeng Kang
Yuhao Wang
Dimin Niu
Hongzhong Zheng
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2021)
Keyphrases
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wide range
logic programming
data sets
logic synthesis
texture synthesis
bayesian networks
high efficiency
classical logic
predicate logic