Fen Ge

Publication Activity (10 Years)

Years Active: 2008-2023
Publications (10 Years): 41

Top Topics

Fault Detection

Fpga Implementation

Top Venues

IEICE Electron. Express

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Jin Zhao, Fang Zhou, Fen Ge, Shuning Wu, Hao Wang
A Lightweight BiSeNet Embedded with YOLOv5 Feature Fusion Network. ICCT (2023)
Hongmin He, Danfeng Qiu, Fen Ge
FPGA implementation and verification of efficient and reconfigurable CNN-LSTM accelerator design. AIBDF (2023)
Wenqiang Gong, Fang Zhou, Fen Ge
A Multi-mode Convolution Coprocessor Based on RISC-V Instruction Set Architecture. ASICON (2023)
Jiantao Ye, Fen Ge, Fang Zhou
A Method of Mapping Convolutional Neural Networks on Resource-limited NoC Platform. ASICON (2023)
Guohui Zhang, Fen Ge, Fang Zhou
A Deep Q Network Hardware Accelerator Based on Heterogeneous Computing. ASICON (2023)
Xin Yue, Fen Ge, Fang Zhou, Ning Wu, Yi Zhang
A Hybrid CNN Compression Approach for Hardware Acceleration. ICCT (2022)
Hao Wang, Danfeng Qiu, Fen Ge, Ying Yang
Implementation of Bidirectional LSTM Accelerator Based on FPGA. ICCT (2022)
Ziyu Li, Fen Ge, Fang Zhou, Ning Wu
An A3C Deep Reinforcement Learning FPGA Accelerator based on Heterogeneous Compute Units. ICCT (2022)
Shuning Wu, Fen Ge, Yi Zhang
A Vehicle Line-Pressing Detection Approach Based on YOLOv5 and DeepSort. ICCT (2022)
Kaiyu Zhao, Fang Zhou, Ning Wu, Jin Zhao, Fen Ge
The Design of a Novel Hardware Trojan without Inactive Signal for AES. ICCT (2022)
Wang Han, Ning Wu, Fang Zhou, Fen Ge
Reconfigurable Multi-algorithm Neural Network Accelerator Based on Target Detection. ICCT (2022)
Xinyu Wang, Ning Wu, Fang Zhou, Fen Ge
Efficient Configurable Digit-Serial Multiplier Based on Improved Karatsuba Algorithm over GF(2m). ICCT (2022)
Zhixiang Xu, Ning Wu, Fang Zhou, Fen Ge
A Defense Method Against Persistent Fault Attack. ICCT (2022)
Jin Wen, Ning Wu, Fen Ge, Fang Zhou, Zhixiang Xu, Benjun Zhang
An Anti-DPA Elliptic Curve Cryptography Scalar Multiplier with Randomized Base Point. ICCT (2021)
Chenchen Cui, Fen Ge, Ziyu Li, Xin Yue, Fang Zhou, Ning Wu
Design and Implementation of OpenCL-Based FPGA Accelerator for YOLOv2. ICCT (2021)
Tong Lu, Fang Zhou, Ning Wu, Fen Ge, Benjun Zhang
Hardware Trojan Detection Method for Gate-Level Netlists Based on the Idea of Few-Shot Learning. ICCT (2021)
Ying Yang, Fen Ge, Danfeng Qiu, Xin Yue, Ziyu Li, Fang Zhou, Ning Wu
Implementation of Reconfigurable CNN-LSTM Accelerator Based on FPGA. ICCT (2021)
Fang Zhou, Caixian Fei, Ning Wu, Fen Ge
). IEICE Electron. Express 18 (11) (2021)
Lili Shen, Ning Wu, Gaizhen Yan, Fen Ge
Collaborative thermal- and traffic-aware adaptive routing scheme for 3D network-on-chip systems. IEICE Electron. Express 18 (4) (2021)
Liangkai Zhao, Ning Wu, Fen Ge, Fang Zhou, Jiahui Zhang, Tong Lu
Small Area Configurable Deep Neural Network Accelerator for IoT System. ICCT (2020)
Lei Zhang, Ning Wu, Fen Ge, Fang Zhou, Mahammad Rehan Yahya
A Dynamic Branch Predictor Based on Parallel Structure of SRNN. IEEE Access 8 (2020)
Wentao Xu, Ning Wu, Fen Ge
Minimizing the number of wavelengths in a cluster WDM mesh-based ONoC through application-specific mapping. IEICE Electron. Express 17 (6) (2020)
Liang Han, Ning Wu, Fen Ge, Fang Zhou, Jin Wen, Peiyao Qing
Differential Fault Attack for the Iterative Operation of AES-192 Key Expansion. ICCT (2020)
Weifeng Zhang, Fen Ge, Chenchen Cui, Ying Yang, Fang Zhou, Ning Wu
Design and Implementation of LSTM Accelerator Based on FPGA. ICCT (2020)
Hao Xiao, Yanming Fan, Fen Ge, Zhang Zhang, Xin Cheng
Algorithm-Hardware Co-Design of Real-Time Edge Detection for Deep-Space Autonomous Optical Navigation. IEICE Trans. Inf. Syst. (10) (2020)
Yayue Zhao, Fen Ge, Chenchen Cui, Fang Zhou, Ning Wu
A Mapping Method for Convolutional Neural Networks on Network-on-Chip. ICCT (2020)
Caixian Fei, Fang Zhou, Ning Wu, Fen Ge, Jin Wen, Peiyao Qin
A Scalable Bit-Parallel Word-Serial Multiplier with Fault Detection on GF(2^m). ICCT (2020)
Muhammad Rehan Yahya, Ning Wu, Gaizhen Yan, Fen Ge, Tanveer Ahmed
RoR: A low insertion loss design of rearrangeable hybrid photonic-plasmonic 6 × 6 non-blocking router for ONoCs. IEICE Electron. Express 16 (13) (2019)
Xinhao Shi, Ning Wu, Fen Ge, Gaizhen Yan, Yan Xing, Xudong Ma
Srax: A Low Crosstalk and Insertion Loss 5×5 Optical Router for Optical Network-on-Chip. IECON (2019)
Yafei Zhang, Ning Wu, Gaizhen Yan, Fen Ge
Machine learning-based dynamic reconfiguration algorithm for reconfigurable NoCs. IEICE Electron. Express 16 (2) (2019)
Qiangjia Bi, Ning Wu, Fang Zhou, Jinbao Zhang, Muhammad Rehan Yahya, Fen Ge
Fault attack hardware Trojan detection method based on ring oscillator. IEICE Electron. Express 16 (8) (2019)
Xiangli Li, Fen Ge, Ben Rui, Ning Wu, Zhou Fang
A dual-threshold credit-based flow control mechanism for 3D Network-on-Chip. ICICDT (2019)
Jinbao Zhang, Ning Wu, Fen Ge, Fang Zhou, Xiaoqing Zhang
Countermeasure against fault sensitivity analysis based on clock check block. IEICE Electron. Express 15 (11) (2018)
Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou
Collaborative fuzzy-based partially-throttling dynamic thermal management scheme for three-dimensional networks-on-chip. IET Comput. Digit. Tech. 11 (1) (2017)
Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou
ArR-DTM: A routing-based DTM for 3D NoCs by adaptive degree regulation. IEICE Electron. Express 14 (9) (2017)
Lili Shen, Ning Wu, Gaizhen Yan, Fen Ge
Thermal-aware task mapping for communication energy minimization on 3D NoC. IEICE Electron. Express 14 (22) (2017)
Hao Xiao, Ning Wu, Fen Ge, Tsuyoshi Isshiki, Hiroaki Kunieda, Jun Xu, Yuangang Wang
Efficient Synchronization for Distributed Embedded Multiprocessors. IEEE Trans. Very Large Scale Integr. Syst. 24 (2) (2016)
Gui Feng, Fen Ge, Ning Wu, Lei Zhou, Jing Liu
MSP based thermal-aware mapping approach for 3D Network-on-Chip under performance constraints. IEICE Electron. Express 13 (7) (2016)
Jia Zhan, Jin Ouyang, Fen Ge, Jishen Zhao, Yuan Xie
Hybrid Drowsy SRAM and STT-RAM Buffer Designs for Dark-Silicon-Aware NoC. IEEE Trans. Very Large Scale Integr. Syst. 24 (10) (2016)
Hao Xiao, Huajuan Zhang, Fen Ge, Ning Wu
A MapReduce architecture for embedded multiprocessor system-on-chips. IEICE Electron. Express 13 (2) (2016)
Xiaoqiang Zhang, Ning Wu, Fang Zhou, Fen Ge
Optimization of Area and Delay for Implementation of the Composite Field Advanced Encryption Standard S-Box. J. Circuits Syst. Comput. 25 (5) (2016)
Jintao Zheng, Ning Wu, Gaizhen Yan, Fen Ge, Lei Zhou
Dynamically reconfigurable simulation platform for 3D NoC based on multi-FPGA. IEICE Electron. Express 12 (7) (2015)
Zhiping Wu, Ning Wu, Lei Zhou, Fen Ge
The Adaptive Thermal and Traffic-Balanced Routing algorithm based on temperature analysis and traffic statistics. IEICE Electron. Express 12 (7) (2015)
Hao Xiao, Ning Wu, Fen Ge, Guanyu Zhu, Lei Zhou
Distributed Synchronization for Message-Passing Based Embedded Multiprocessors. IEICE Trans. Inf. Syst. (2) (2015)
RongRong Zhou, Fen Ge, Gui Feng, Ning Wu
A network components insertion method for 3D application-specific Network-on-Chip. ASICON (2015)
Jia Zhan, Jin Ouyang, Fen Ge, Jishen Zhao, Yuan Xie
DimNoC: a dim silicon approach towards power-efficient on-chip network. DAC (2015)
Fen Ge, Jia Zhan, Yuan Xie, Vijaykrishnan Narayanan
Exploring memory controller configurations for many-core systems with 3D stacked DRAMs. ISQED (2015)
Qiaosha Zou, Jia Zhan, Fen Ge, Matt Poremba, Yuan Xie
Designing vertical bandwidth reconfigurable 3D NoCs for many core systems. 3DIC (2014)
Gui Feng, Fen Ge, Shuang Yu, Ning Wu
A thermal-aware mapping algorithm for 3D Mesh Network-on-Chip architecture. ASICON (2013)
Shuang Yu, Fen Ge, Gui Feng, Ning Wu
A two-phase floorplanning approach for Application-specific Network-on-Chip. ASICON (2013)
Ying Zhang, Ning Wu, Xiazhi Ke, Fen Ge
A Coverage-Driven Verification Platform for Evaluating NoC Performance and Test Structure. AINA Workshops (2012)
Ning Wu, Fen Ge, Fei Wu
Design of a GALS Wrapper for Network on Chip. CSIE (3) (2009)
Fen Ge, Ning Wu
A minimum-path mapping algorithm for 2D mesh Network on Chip architecture. APCCAS (2008)