Login / Signup
Hybrid Drowsy SRAM and STT-RAM Buffer Designs for Dark-Silicon-Aware NoC.
Jia Zhan
Jin Ouyang
Fen Ge
Jishen Zhao
Yuan Xie
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2016)
Keyphrases
</>
random access memory
cmos technology
power consumption
low cost
high speed
low power
network on chip
high density
multi processor
design considerations
low voltage
transmission electron microscopy