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CheckerCore: enhancing an FPGA soft core to capture worst-case execution times.
Jin Ouyang
Raghuveer Raghavendra
Sibin Mohan
Tao Zhang
Yuan Xie
Frank Mueller
Published in:
CASES (2009)
Keyphrases
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execution times
worst case
upper bound
low cost
lower bound
average case
approximation algorithms
hardware implementation
communication delays
error bounds
real time
greedy algorithm
space complexity
signal processing
high speed
np hard
parallel architecture
constant factor
worst case analysis
computational complexity