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Optimizing power and performance for reliable on-chip networks.
Aditya Yanamandra
Soumya Eachempati
Niranjan Soundararajan
Vijaykrishnan Narayanan
Mary Jane Irwin
Ramakrishnan Krishnan
Published in:
ASP-DAC (2010)
Keyphrases
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high speed
ibm power processor
high bandwidth
social networks
low cost
chip design
power grid
high density
network design
single chip
power dissipation
network structure
multithreading
analog vlsi
power consumption
cost effective
power law
heterogeneous networks
complex networks
evolvable hardware