Soontae Kim

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 42

Top Topics

Embedded Systems

Top Venues

IEEE Trans. Computers

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Wonyoung Lee, Mincheol Kang, Soontae Kim
Highly VM-Scalable SSD in Cloud Storage Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (1) (2024)
Myeongjae Jang, Jinkwon Kim, Haejin Nam, Soontae Kim
Zero and Narrow-Width Value-Aware Compression for Quantized Convolutional Neural Networks. IEEE Trans. Computers 73 (1) (2024)
Jesung Kim, Mincheol Kang, Bohun Seo, Jeongkyu Hong, Soontae Kim
Effective Emoticon Suggestion Technique Based on Active Emotional Input Using Facial Expressions and Heart Rate Signals. Sensors 23 (9) (2023)
Jinkwon Kim, Myeongjae Jang, Haejin Nam, Soontae Kim
HARP: Hardware-Based Pseudo-Tiling for Sparse Matrix Multiplication Accelerator. MICRO (2023)
Mincheol Kang, Wonyoung Lee, Jinkwon Kim, Soontae Kim
PR-SSD: Maximizing Partial Read Potential by Exploiting Compression and Channel-Level Parallelism. IEEE Trans. Computers 72 (3) (2023)
Sangwon Han, Geonyeong Park, Yoonyong Ahn, Gunhee Cho, Soontae Kim, Kunsoo Huh
Estimated State-Based Optimal Path Planning and Control System for Lane-Keeping of Semi-Trailer Trucks. ITSC (2023)
Junoh Moon, Mincheol Kang, Wonyoung Lee, Soontae Kim
Salvaging Runtime Bad Blocks by Skipping Bad Pages for Improving SSD Performance. DATE (2022)
Jinkwon Kim, Mincheol Kang, Jeongkyu Hong, Soontae Kim
Exploiting Inter-block Entropy to Enhance the Compressibility of Blocks with Diverse Data. HPCA (2022)
Jesung Kim, Wonyoung Lee, Jeongkyu Hong, Soontae Kim
Efficient Integrity-Tree Structure for Convolutional Neural Networks through Frequent Counter Overflow Prevention in Secure Memories. Sensors 22 (22) (2022)
Myeongjae Jang, Jinkwon Kim, Jesung Kim, Soontae Kim
ENCORE Compression: Exploiting Narrow-width Values for Quantized Deep Neural Networks. DATE (2022)
Hamed Farbeh, Leila Delshadtehrani, Hyeonggyu Kim, Soontae Kim
ECC-United Cache: Maximizing Efficiency of Error Detection/Correction Codes in Associative Cache Memories. IEEE Trans. Computers 70 (4) (2021)
Imran Fareed, Mincheol Kang, Wonyoung Lee, Soontae Kim
Update Frequency-Directed Subpage Management for Mitigating Garbage Collection and DRAM Overheads. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (12) (2021)
Jinkwon Kim, Seokin Hong, Jeongkyu Hong, Soontae Kim
CID: Co-Architecting Instruction Cache and Decompression System for Embedded Systems. IEEE Trans. Computers 70 (7) (2021)
Imran Fareed, Mincheol Kang, Wonyoung Lee, Soontae Kim
Leveraging intra-page update diversity for mitigating write amplification in SSDs. ICS (2020)
Bohun Seo, Hyeonggyu Kim, Soontae Kim
Freezing: Eliminating Unnecessary Drawing Computation for Low Power. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (1) (2020)
Muhammad Avais Qureshi, Jungwoo Park, Soontae Kim
SALE: Smartly Allocating Low-Cost Many-Bit ECC for Mitigating Read and Write Errors in STT-RAM Caches. IEEE Trans. Very Large Scale Integr. Syst. 28 (6) (2020)
Myoungjun Lee, Soontae Kim
Time-sensitivity-aware shared cache architecture for multi-core embedded systems. J. Supercomput. 75 (10) (2019)
Wonyoung Lee, Mincheol Kang, Seokin Hong, Soontae Kim
Interpage-Based Endurance-Enhancing Lower State Encoding for MLC and TLC Flash Memory Storages. IEEE Trans. Very Large Scale Integr. Syst. 27 (9) (2019)
Jungwoo Park, Myoungjun Lee, Soontae Kim, Minho Ju, Jeongkyu Hong
MH Cache: A Mult Stephen Jarvisi-retention STT-RAM-based Low-power Last-level Cache for Mobile Hardware Rendering Systems. ACM Trans. Archit. Code Optim. 16 (3) (2019)
Muhammad Avais Qureshi, Hyeonggyu Kim, Soontae Kim
A Restore-Free Mode for MLC STT-RAM Caches. IEEE Trans. Very Large Scale Integr. Syst. 27 (6) (2019)
Hyeonggyu Kim, Minho Ju, Soontae Kim
OnNetwork+: Network Delay-Aware Management for Mobile Systems. ACM Trans. Embed. Comput. Syst. 17 (3) (2018)
Jeongkyu Hong, Hyeonggyu Kim, Soontae Kim
EAR: ECC-aided refresh reduction through 2-D zero compression. PACT (2018)
Mincheol Kang, Wonyoung Lee, Soontae Kim
Subpage-Aware Solid State Drive for Improving Lifetime and Performance. IEEE Trans. Computers 67 (10) (2018)
Jeongkyu Hong, Soontae Kim
Smart ECC Allocation Cache Utilizing Cache Data Space. IEEE Trans. Computers 66 (2) (2017)
Yebin Lee, Hyeonggyu Kim, Seokin Hong, Soontae Kim
Partial Row Activation for Low-Power DRAM System. HPCA (2017)
Jesung Kim, Jongmin Lee, Soontae Kim
TLB Index-Based Tagging for Reducing Data Cache and TLB Energy Consumption. IEEE Trans. Computers 66 (7) (2017)
Hyeonggyu Kim, Soontae Kim, Jooheung Lee
Write-Amount-Aware Management Policies for STT-RAM Caches. IEEE Trans. Very Large Scale Integr. Syst. 25 (4) (2017)
Jungwoo Park, Jongmin Lee, Soontae Kim
A Way-Filtering-Based Dynamic Logical-Associative Cache Architecture for Low-Energy Consumption. IEEE Trans. Very Large Scale Integr. Syst. 25 (3) (2017)
Jeongkyu Hong, Soontae Kim
Flexible ECC Management for Low-Cost Transient Error Protection of Last-Level Caches. IEEE Trans. Very Large Scale Integr. Syst. 24 (6) (2016)
Minho Ju, Hyeonggyu Kim, Soontae Kim
Network delay-aware energy management for mobile systems. DATE (2016)
Yebin Lee, Soontae Kim
RAMS: DRAM Rank-Aware Memory Scheduling for Energy Saving. IEEE Trans. Computers 65 (10) (2016)
Yebin Lee, Soontae Kim
CLAP: Clustered Look-Ahead Prefetching for Energy-Efficient DRAM System. IEEE Trans. Very Large Scale Integr. Syst. 24 (5) (2016)
Seokin Hong, Soontae Kim
Designing a Resilient L1 Cache Architecture to Process Variation-Induced Access-Time Failures. IEEE Trans. Computers 65 (10) (2016)
Jongmin Lee, Soontae Kim
Write Buffer-Oriented Energy Reduction in the L1 Data Cache for Embedded Systems. IEEE Trans. Very Large Scale Integr. Syst. 24 (3) (2016)
Minho Ju, Hyeonggyu Kim, Soontae Kim
MofySim: A mobile full-system simulation framework for energy consumption and performance analysis. ISPASS (2016)
Hamed Farbeh, Hyeonggyu Kim, Seyed Ghassem Miremadi, Soontae Kim
Floating-ECC: Dynamic Repositioning of Error Correcting Code Bits for Extending the Lifetime of STT-RAM Caches. IEEE Trans. Computers 65 (12) (2016)
Mohammad Abdur Rouf, Soontae Kim
Low-Cost Control Flow Protection via Available Redundancies in the Microprocessor Pipeline. IEEE Trans. Very Large Scale Integr. Syst. 23 (1) (2015)
Jongmin Lee, Soontae Kim
Filter Data Cache: An Energy-Efficient Small L0 Data Cache Architecture Driven byMiss Cost Reduction. IEEE Trans. Computers 64 (7) (2015)
Tayyeb Mahmood, Seokin Hong, Soontae Kim
Ensuring Cache Reliability and Energy Scaling at Near-Threshold Voltage With Macho. IEEE Trans. Computers 64 (6) (2015)
Minho Ju, Hyeonggyu Kim, Mincheol Kang, Soontae Kim
Efficient memory reclaiming for mitigating sluggish response in mobile devices. ICCE-Berlin (2015)
Jeongkyu Hong, Jesung Kim, Soontae Kim
Exploiting Same Tag Bits to Improve the Reliability of the Cache Memories. IEEE Trans. Very Large Scale Integr. Syst. 23 (2) (2015)
Seokin Hong, Soontae Kim
A Low-Cost Mechanism Exploiting Narrow-Width Values for Tolerating Hard Faults in ALU. IEEE Trans. Computers 64 (9) (2015)
Seokin Hong, Jongmin Lee, Soontae Kim
Ternary cache: Three-valued MLC STT-RAM caches. ICCD (2014)
Tayyeb Mahmood, Soontae Kim, Seokin Hong
Macho: A failure model-oriented adaptive cache architecture to enable near-threshold voltage scaling. HPCA (2013)
Yebin Lee, Soontae Kim, Seokin Hong, Jongmin Lee
Skinflint DRAM system: Minimizing DRAM chip writes for low power. HPCA (2013)
Myoungjun Lee, Soontae Kim
Performance-controllable shared cache architecture for multi-core soft real-time systems. ICCD (2013)
Tayyeb Mahmood, Soontae Kim
Fault buffers - Enabling near-true voltage scaling in variation-sensitive L1 caches. Des. Autom. Embed. Syst. 17 (2) (2013)
Seokin Hong, Soontae Kim
AVICA: an access-time variation insensitive L1 cache architecture. DATE (2013)
Mohammad Abdur Rouf, Soontae Kim
Low-cost control flow error protection by exploiting available redundancies in the pipeline. ASP-DAC (2012)
Jeongkyu Hong, Soontae Kim
ECC string: Flexible ECC management for low-cost error protection of L2 caches. ICCD (2012)
Jongmin Lee, Soontae Kim
Adopting TLB index-based tagging to data caches for tag energy reduction. ISLPED (2012)
Kwangcheol Shin, Soontae Kim
Predictive routing for mobile sinks in wireless sensor networks: a milestone-based approach. J. Supercomput. 62 (3) (2012)
Kwangcheol Shin, Kyungjun Kim, Soontae Kim
Traffic management strategy for delay-tolerant networks. J. Netw. Comput. Appl. 35 (6) (2012)
Sukki Kim, Soontae Kim, Yebin Lee
DRAM power-aware rank scheduling. ISLPED (2012)
Divyan Munirathnam Konidala, Made Harta Dwijaksara, Kwangjo Kim, Dongman Lee, Byoungcheon Lee, Daeyoung Kim, Soontae Kim
Resuscitating privacy-preserving mobile payment with customer in complete control. Pers. Ubiquitous Comput. 16 (6) (2012)
Kwangcheol Shin, Soontae Kim
Enhanced buffer management policy that utilises message properties for delay-tolerant networks. IET Commun. 5 (6) (2011)
Jongmin Lee, Seokin Hong, Soontae Kim
TLB index-based tagging for cache energy reduction. ISLPED (2011)
Taeju Park, Soontae Kim
Dynamic scheduling algorithm and its schedulability analysis for certifiable dual-criticality systems. EMSOFT (2011)
Kwangcheol Shin, Kyungjun Kim, Soontae Kim
ADSR: Angle-Based Multi-hop Routing Strategy for Mobile Wireless Sensor Networks. APSCC (2011)
Yebin Lee, Soontae Kim
DRAM energy reduction by prefetching-based memory traffic clustering. ACM Great Lakes Symposium on VLSI (2011)
Soontae Kim, Jongmin Lee, Jesung Kim, Seokin Hong
Residue cache: a low-energy low-area L2 cache architecture via compression and partial hits. MICRO (2011)
Tayyeb Mahmood, Soontae Kim
Realizing near-true voltage scaling in variation-sensitive l1 caches via fault buffers. CASES (2011)
Seokin Hong, Soontae Kim
Lizard: Energy-efficient hard fault detection, diagnosis and isolation in the ALU. ICCD (2010)
Soontae Kim, Jongmin Lee
Write buffer-oriented energy reduction in the L1 data cache of two-level caches for the embedded system. ACM Great Lakes Symposium on VLSI (2010)
Jesung Kim, Soontae Kim, Yebin Lee
SimTag: Exploiting tag bits similarity to improve the reliability of the data caches. DATE (2010)
Tayyeb Mahmood, Soontae Kim
Fine-Grained Fault Tolerance for Process Variation-Aware Caches. ISVLSI (2010)
Mohammad Abdur Rouf, Soontae Kim
Modeling and Evaluation of Control Flow Vulnerability in the Embedded System. MASCOTS (2010)
Koustav Bhattacharya, Nagarajan Ranganathan, Soontae Kim
A Framework for Correction of Multi-Bit Soft Errors in L2 Caches Based on Redundancy. IEEE Trans. Very Large Scale Integr. Syst. 17 (2) (2009)
Soontae Kim
Reducing Area Overhead for Error-Protecting Large L2/L3 Caches. IEEE Trans. Computers 58 (3) (2009)
Seokin Hong, Soontae Kim
TEPS: Transient Error Protection Utilizing Sub-word Parallelism. ISVLSI (2009)
Jongmin Lee, Soontae Kim
An energy-delay efficient 2-level data cache architecture for embedded system. ISLPED (2009)
Koustav Bhattacharya, Soontae Kim, Nagarajan Ranganathan
Improving the reliability of on-chip L2 cache using redundancy. ICCD (2007)
Soontae Kim
Reducing ALU and Register File Energy by Dynamic Zero Detection. IPCCC (2007)
Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin
Reducing non-deterministic loads in low-power caches via early cache set resolution. Microprocess. Microsystems 31 (5) (2007)
Soontae Kim
Area-efficient error protection for caches. DATE (2006)
Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin
Scheduling Reusable Instructions for Power Reduction. DATE (2004)
J. Juran, Ali R. Hurson, Narayanan Vijaykrishnan, Soontae Kim
Data Organization and Retrieval on Parallel Air Channels: Performance and Energy Issues. Wirel. Networks 10 (2) (2004)
Amisha Parikh, Soontae Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
Instruction Scheduling for Low Power. J. VLSI Signal Process. 37 (1) (2004)
Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
Optimizing Leakage Energy Consumption in Cache Bitlines. Des. Autom. Embed. Syst. 9 (1) (2004)
Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin, Lizy Kurian John
On load latency in low-power caches. ISLPED (2003)
Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Richard R. Brooks, Soontae Kim, Wei Zhang
Masking the Energy Behavior of DES Encryption. DATE (2003)
Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
Partitioned instruction cache architecture for energy efficiency. ACM Trans. Embed. Comput. Syst. 2 (2) (2003)
Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali
Power-aware partitioned cache architectures. ISLPED (2001)
Narayanan Vijaykrishnan, Mahmut T. Kandemir, Soontae Kim, Samarjeet Singh Tomar, Anand Sivasubramaniam, Mary Jane Irwin
Energy Behavior of Java Applications from the Memory Perspective. Java Virtual Machine Research and Technology Symposium (2001)