Improving the reliability of on-chip L2 cache using redundancy.

Koustav Bhattacharya Soontae Kim Nagarajan Ranganathan

Published in: ICCD (2007)

Keyphrases

low cost
high speed
memory subsystem
multithreading
memory access
processor core
real time
high density
physical design
vlsi implementation
analog vlsi
main memory
cache management