Instruction Scheduling for Low Power.
Amisha ParikhSoontae KimMahmut T. KandemirNarayanan VijaykrishnanMary Jane IrwinPublished in: J. VLSI Signal Process. (2004)
Keyphrases
- low power
- instruction scheduling
- low cost
- power consumption
- high speed
- constraint programming
- vlsi architecture
- single chip
- high power
- multithreading
- wireless transmission
- cmos technology
- vlsi circuits
- power reduction
- gate array
- mixed signal
- logic circuits
- digital signal processing
- signal processor
- low power consumption
- constraint satisfaction problems
- probabilistic model
- np hard