Ternary cache: Three-valued MLC STT-RAM caches.
Seokin HongJongmin LeeSoontae KimPublished in: ICCD (2014)
Keyphrases
- memory access
- data access
- main memory
- cache misses
- cache hit ratio
- caching scheme
- memory hierarchy
- access latency
- random access memory
- shared memory
- access patterns
- memory management
- data management
- external memory
- processing units
- prefetching
- high volume
- inference rules
- database management systems
- hybrid algorithms
- multi label
- data structure
- nonmonotonic logics
- random access
- hardware implementation