Time-sensitivity-aware shared cache architecture for multi-core embedded systems.
Myoungjun LeeSoontae KimPublished in: J. Supercomput. (2019)
Keyphrases
- embedded systems
- hardware software
- computing power
- memory hierarchy
- embedded devices
- resource limited
- embedded software
- instruction set
- low cost
- real time systems
- processing power
- software systems
- protocol stack
- field programmable gate array
- real time image processing
- software architecture
- hw sw
- real time
- consumer electronics
- safety critical
- smart camera
- prefetching
- embedded real time systems
- real time embedded
- multithreading
- hardware design
- hardware implementation
- hardware and software
- main memory
- software development
- source code
- response time
- query processing
- data structure
- high level