MH Cache: A Mult Stephen Jarvisi-retention STT-RAM-based Low-power Last-level Cache for Mobile Hardware Rendering Systems.
Jungwoo ParkMyoungjun LeeSoontae KimMinho JuJeongkyu HongPublished in: ACM Trans. Archit. Code Optim. (2019)
Keyphrases
- low power
- low cost
- power consumption
- single chip
- main memory
- wireless transmission
- high speed
- memory access
- real time
- low power consumption
- computing systems
- digital signal processing
- vlsi architecture
- multithreading
- embedded systems
- processing capabilities
- computer systems
- delay insensitive
- image sensor
- power reduction
- vlsi circuits
- gate array
- digital circuits
- mobile environments
- digital camera
- mobile devices
- image processing