A low power approach to system level pipelined interconnect design.

Vikas Chandra Anthony Xu Herman Schmit

Published in: SLIP (2004)

Keyphrases

low power
high speed
power dissipation
power consumption
single chip
low cost
vlsi architecture
low power consumption
logic circuits
gate array
digital signal processing
cmos technology
power reduction
vlsi circuits
delay insensitive
nm technology
computer vision and image processing