John A. Nestor

Publication Activity (10 Years)

Years Active: 1982-2021
Publications (10 Years): 2

Top Topics

Engineering Education

Role Playing Game

Remote Laboratories

Computing Power

Top Venues

ACM Great Lakes Symposium on VLSI

Publications

John A. Nestor
Experiences with Remote Teaching an Embedded Systems Course. ACM Great Lakes Symposium on VLSI (2021)
John A. Nestor
From microelectronics to making: Incorporating microelectronics in a first-year engineering course. MSE (2017)
John F. Greco, John A. Nestor
An undergraduate embedded systems project. MSE (2011)
John A. Nestor
HDL coding guidelines for student projects. MSE (2011)
Berkin Ilbeyi, John A. Nestor
VCache: visualization applet for processor caches. ITiCSE (2010)
John A. Nestor, Chris Nadovich
An FPGA-based wireless network capstone project. MSE (2009)
John A. Nestor
Experience With the CADAPPLETS Project. IEEE Trans. Educ. 51 (3) (2008)
John A. Nestor
Experience with the CADAPPLETS Project. MSE (2007)
John A. Nestor, Jeremy Lavine
L4: An FPGA-Based Accelerator for Detailed Maze Routing. FPL (2007)
John A. Nestor
Teaching Computer Organization with HDLs: An Incremental Approach. MSE (2005)
John A. Nestor
L3: An FPGA-based multilayer maze routing accelerator. Microprocess. Microsystems 29 (2-3) (2005)
John A. Nestor
FPGA Implementation of a Maze Routing Accelerator. FPL (2003)
John A. Nestor, David A. Rich
Integrating Digital, Analog, and Mixed-Signal Design in an Undergraduate ECE Curriculum. MSE (2003)
John A. Nestor
A new look at hardware maze routing. ACM Great Lakes Symposium on VLSI (2002)
John A. Nestor
Web-Based Visualization Tools for Teaching VLSI CAD Algorithms. MSE (2001)
John A. Nestor
Visual register-transfer description of VLSI microarchitectures. IEEE Trans. Very Large Scale Integr. Syst. 1 (1) (1993)
John A. Nestor, Ganesh Krishnamoorthy
SALSA: a new approach to scheduling with timing constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (8) (1993)
Michael R. Rhinehart, John A. Nestor
SALSE II: A Fast Transformational Scheduler for High-level Synthesis. ISCAS (1993)
Ganesh Krishnamoorthy, John A. Nestor
Data Path Allocation using an Extended Binding Model. DAC (1992)
John A. Nestor, Ganesh Krishnamoorthy
SALSA: A New Approach to Scheduling with Timing Constraints. ICCAD (1990)
John A. Nestor, Bassel Soudan, Zubair Mayet
MIES: a microarchitecture design tool. MICRO (1989)
Donald E. Thomas, Elizabeth M. Dirkes, Robert A. Walker, Jayanth V. Rajan, John A. Nestor, Robert L. Blackburn
The System Architect's Workbench. DAC (1988)
David P. LaPotin, Sani R. Nassif, Jayanth V. Rajan, Michael L. Bushnell, John A. Nestor
DIF: A framework for VLSI multi-level representation. Integr. 2 (3) (1984)
Donald E. Thomas, John A. Nestor
Defining and Implementing a Multilevel Design Representation with Simulation Applications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2 (3) (1983)
John A. Nestor, Donald E. Thomas
Defining and implementing a multilevel design representation with simulation applications. DAC (1982)