Subsetting Behavioral Intellectual Property for Low Power ASIP Design.
William E. DoughertyDavid J. PursleyDonald E. ThomasPublished in: J. VLSI Signal Process. (1999)
Keyphrases
- low power
- intellectual property
- single chip
- high speed
- power consumption
- low cost
- low power consumption
- vlsi architecture
- logic circuits
- gate array
- power dissipation
- mixed signal
- cmos technology
- digital signal processing
- patent search
- vlsi circuits
- clef ip
- ultra low power
- information systems
- delay insensitive
- cmos image sensor