Pinaki Mazumder

ORCID

Publication Activity (10 Years)

Years Active: 1986-2023
Publications (10 Years): 20

Top Venues

CoRR

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Neural Networks Learn. Syst.

IEEE Trans. Computers

Publications

Aditya Shukla, Mikhail Erementchouk, Pinaki Mazumder
Custom CMOS Ising Machine Based on Relaxed Burer-Monteiro-Zhang Heuristic. IEEE Trans. Computers 72 (10) (2023)
Matthew Guthaus, Christopher Batten, Erik Brunvand, Pierre-Emmanuel Gaillardon, David Harris, Rajit Manohar, Pinaki Mazumder, Larry T. Pileggi, James E. Stine
NSF Integrated Circuit Research, Education and Workforce Development Workshop Final Report. CoRR (2023)
Mikhail Erementchouk, Aditya Shukla, Pinaki Mazumder
Self-contained relaxation-based dynamical Ising machines. CoRR (2023)
Xiangxiang Wang, Yongbin Yu, Jingye Cai, Shouming Zhong, Nijing Yang, Kaibo Shi, Pinaki Mazumder, Tashi Nyima
Dynamic Pinning Synchronization of Fuzzy-Dependent-Switched Coupled Memristive Neural Networks With Mismatched Dimensions on Time Scales. IEEE Trans. Fuzzy Syst. 30 (3) (2022)
Aditya Shukla, Mikhail Erementchouk, Pinaki Mazumder
Scalable almost-linear dynamical Ising machines. CoRR (2022)
Anindya Banerjee, Sankar Basu, Erik Brunvand, Pinaki Mazumder, Rance Cleaveland, Gurdip Singh, Margaret Martonosi, Fernanda Pembleton
Navigating the Seismic Shift of Post-Moore Computer Systems Design. IEEE Micro 41 (6) (2021)
Carlo Ottaviani, Matthew J. Woolley, Misha Erementchouk, John F. Federici, Pinaki Mazumder, Stefano Pirandola, Christian Weedbrook
Terahertz Quantum Cryptography. IEEE J. Sel. Areas Commun. 38 (3) (2020)
Md. Faizul Bari, Soumitra Roy Joy, Md. Zunaid Baten, Pinaki Mazumder
Process Variation in Spoof Plasmon Interconnect: Consequences and Compensations. RWS (2020)
Yongbin Yu, Ekong Favour, Pinaki Mazumder
Convolutional Neural Network Design for Breast Cancer Medical Image Classification. ICCT (2020)
Soumitra Roy Joy, Mikhail Erementchouk, Hao Yu, Pinaki Mazumder
Spoof Plasmon Interconnects - Communications Beyond RC Limit. IEEE Trans. Commun. 67 (1) (2019)
Nan Zheng, Pinaki Mazumder
A Scalable Low-Power Reconfigurable Accelerator for Action-Dependent Heuristic Dynamic Programming. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2018)
Nan Zheng, Pinaki Mazumder
A Low-Power Hardware Architecture for On-Line Supervised Learning in Multi-Layer Spiking Neural Networks. ISCAS (2018)
Nan Zheng, Pinaki Mazumder
A Low-Power Circuit for Adaptive Dynamic Programming. VLSI Design (2018)
Nan Zheng, Pinaki Mazumder
Online Supervised Learning for Hardware-Based Multilayer Spiking Neural Networks Through the Modulation of Weight-Dependent Spike-Timing-Dependent Plasticity. IEEE Trans. Neural Networks Learn. Syst. 29 (9) (2018)
Nan Zheng, Pinaki Mazumder
An Efficient Eligible Error Locator Polynomial Searching Algorithm and Hardware Architecture for One-Pass Chase Decoding of BCH Codes. IEEE Trans. Circuits Syst. II Express Briefs (5) (2017)
Nan Zheng, Pinaki Mazumder
Modeling and Mitigation of Static Noise Margin Variation in Subthreshold SRAM Cells. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2017)
Jaeyoung Kim, Pinaki Mazumder
A robust 12T SRAM cell with improved write margin for ultra-low power applications in 40 nm CMOS. Integr. 57 (2017)
Nan Zheng, Pinaki Mazumder
Hardware-Friendly Actor-Critic Reinforcement Learning Through Modulation of Spike-Timing-Dependent Plasticity. IEEE Trans. Computers 66 (2) (2017)
Jaeyoung Kim, Pinaki Mazumder
Energy-Efficient Hardware Architecture of Self-Organizing Map for ECG Clustering in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs (9) (2017)
Pinaki Mazumder, D. Hu, Idongesit E. Ebong, Xu Zhang, Z. Xu, Silvia Ferrari
Digital implementation of a virtual insect trained by spike-timing dependent plasticity. Integr. 54 (2016)
Shukai Duan, Xiaofang Hu, Zhekang Dong, Lidan Wang, Pinaki Mazumder
Memristor-Based Cellular Nonlinear/Neural Network: Design, Analysis, and Applications. IEEE Trans. Neural Networks Learn. Syst. 26 (6) (2015)
Nan Zheng, Jaeyoung Kim, Pinaki Mazumder
A low-power reconfigurable CMOS power amplifier for wireless sensor network applications. ISCAS (2014)
Yalcin Yilmaz, Pinaki Mazumder
Nonvolatile Nanopipelining Logic Using Multiferroic Single-Domain Nanomagnets. IEEE Trans. Very Large Scale Integr. Syst. 21 (7) (2013)
Woo Hyung Lee, Pinaki Mazumder
Color image processing with multi-peak resonant tunneling diodes. ACM J. Emerg. Technol. Comput. Syst. 9 (3) (2013)
Jaeyoung Kim, Kwen-Siong Chong, Joseph Sylvester Chang, Pinaki Mazumder
A 250mV sub-threshold asynchronous 8051microcontroller with a novel 16T SRAM cell for improved reliability in 40nm CMOS. ACM Great Lakes Symposium on VLSI (2013)
Shukai Duan, Xiaofang Hu, Lidan Wang, Chuandong Li, Pinaki Mazumder
Memristor-based RRAM with applications. Sci. China Inf. Sci. 55 (6) (2012)
Kwen-Siong Chong, Joseph S. Chang, Idongesit E. Ebong, Yalcin Yilmaz, Pinaki Mazumder
Comparison of FFT/IFFT Designs Utilizing Different Low Power Techniques. ISED (2012)
Idongesit E. Ebong, Pinaki Mazumder
CMOS and Memristor-Based Neural Network Design for Position Detection. Proc. IEEE 100 (6) (2012)
Pinaki Mazumder, Sung-Mo Kang, Rainer Waser
Memristors: Devices, Models, and Applications [Scanning the Issue]. Proc. IEEE 100 (6) (2012)
Alfredo Benso, Yiorgos Makris, Pinaki Mazumder
Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications. IEEE Trans. Computers 60 (4) (2011)
Yalcin Yilmaz, Pinaki Mazumder
Threshold Read Method for Multi-bit Memristive Crossbar Memory. ISED (2011)
Pinaki Mazumder
Disruptive technologies and neurally-inspired architectures. ACM Great Lakes Symposium on VLSI (2009)
Pinaki Mazumder, Sing-Rong Li, Idongesit E. Ebong
Tunneling-Based Cellular Nonlinear Network Architectures for Image Processing. IEEE Trans. Very Large Scale Integr. Syst. 17 (4) (2009)
Baohua Wang, Pinaki Mazumder
An accurate interconnect thermal model using equivalent transmission line circuit. DATE (2009)
Baohua Wang, Pinaki Mazumder
Accelerated Chip-Level Thermal Analysis Using Multilayer Green's Function. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (2) (2007)
Qinwei Xu, Pinaki Mazumder
Efficient Modeling of Transmission Lines With Electromagnetic Wave Coupling by Using the Finite Difference Quadrature Method. IEEE Trans. Very Large Scale Integr. Syst. 15 (12) (2007)
Baohua Wang, Pinaki Mazumder
Bounding Supply Noise Induced Path Delay Variation Using a Relaxation Approach. VLSI Design (2006)
Baohua Wang, Pinaki Mazumder
A logarithmic full-chip thermal analysis algorithm based on multi-layer Green's function. DATE (2006)
Baohua Wang, Pinaki Mazumder
Optimization of circuit trajectories: an auxiliary network approach. ASP-DAC (2006)
Woo Hyung Lee, Pinaki Mazumder
Parallel Processing Based Power Reduction in a 256 State Viterbi Decoder. ASAP (2006)
Sing-Rong Li, Pinaki Mazumder, Kyounghoon Yang
On the functional failure and switching time analysis of the MOBILE circuit [monostable-bistable logic element]. ISCAS (3) (2005)
Hui Zhang, Pinaki Mazumder
Design of a new sense amplifier flip-flop with improved power-delay-product. ISCAS (2) (2005)
Baohua Wang, Pinaki Mazumder
EM Wave Coupling Noise Modeling Based on Chebyshev Approximation and Exact Moment Formulation. DATE (2005)
Baohua Wang, Pinaki Mazumder
Integrating lumped networks into full wave TLM/FDTD methods using passive discrete circuit models. ISCAS (3) (2005)
Woo Hyung Lee, Pinaki Mazumder
New logic circuits consisting of quantum dots and CMOS. ECCTD (2005)
Baohua Wang, Pinaki Mazumder
Multivariate Normal Distribution Based Statistical Timing Analysis Using Global Projection and Local Expansion. VLSI Design (2005)
Baohua Wang, Pinaki Mazumder
On optimality of adiabatic switching in MOS energy-recovery circuit. ISLPED (2004)
Baohua Wang, Pinaki Mazumder
On optimality of adiabatic switching in MOS energy-recovery circuit. ISLPED (2004)
Li Ding, Pinaki Mazumder
On circuit techniques to improve noise immunity of CMOS dynamic logic. IEEE Trans. Very Large Scale Integr. Syst. 12 (9) (2004)
Baohua Wang, Pinaki Mazumder
Fast thermal analysis for VLSI circuits via semi-analytical Green's function in multi-layer materials. ISCAS (2) (2004)
Qinwei Xu, Pinaki Mazumder
Modeling of transmission lines with EM wave coupling by the finite difference quadrature method. ACM Great Lakes Symposium on VLSI (2004)
Hui Zhang, Pinaki Mazumder, Kyounghoon Yang
Resonant tunnelling diode based QMOS edge triggered flip-flop design. ISCAS (3) (2004)
Sing-Rong Li, Pinaki Mazumder, Leon O. Chua
On the implementation of RTD based CNNs. ISCAS (3) (2004)
Li Ding, Pinaki Mazumder
A novel technique to improve noise immunity of CMOS dynamic logic circuits. DAC (2004)
Li Ding, Pinaki Mazumder
Dynamic Noise Margin: Definitions and Model. VLSI Design (2004)
Alejandro F. González, Pinaki Mazumder
Comparison of Bistable Circuits Based on Resonant-Tunneling Diodes. VLSI Design (2003)
Li Ding, Pinaki Mazumder
Simultaneous switching noise analysis using application specific device modeling. IEEE Trans. Very Large Scale Integr. Syst. 11 (6) (2003)
Li Ding, Pinaki Mazumder
Modeling Noise Transfer Characteristic of Dynamic Logic Gates. DATE (2003)
Qinwei Xu, Pinaki Mazumder
Equivalent-circuit interconnect modeling based on the fifth-order differential quadrature methods. IEEE Trans. Very Large Scale Integr. Syst. 11 (6) (2003)
Li Ding, David T. Blaauw, Pinaki Mazumder
Accurate crosstalk noise modeling for early signal integrity analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (5) (2003)
Baohua Wang, Pinaki Mazumder
Subgridding method for speeding up FD-TLM circuit simulation. ISCAS (3) (2003)
Qinwei Xu, Pinaki Mazumder
Efficient interconnect modeling by Finite Difference Quadrature methods. ISCAS (4) (2003)
Hui Zhang, Pinaki Mazumder, Li Ding, Kyounghoon Yang
Performance modeling of resonant tunneling based RAMs. ISCAS (4) (2003)
Li Ding, Pinaki Mazumder
The Impact of Bit-Line Coupling and Ground Bounce on CMOS SRAM Performance. VLSI Design (2003)
Qinwei Xu, Pinaki Mazumder
Efficient Macromodeling for On-Chip Interconnects. VLSI Design (2002)
Qinwei Xu, Pinaki Mazumder
Formulation of Low-Order Dominant Poles for Y-Matrix of Interconnects. DATE (2002)
Li Ding, Pinaki Mazumder
Modified long channel model for analytical study of DSM circuits. ISCAS (5) (2002)
Qinwei Xu, Pinaki Mazumder
Novel interconnect modeling by using high-order compact finite difference methods. ACM Great Lakes Symposium on VLSI (2002)
Qinwei Xu, Pinaki Mazumder, Li Ding
Novel macromodeling for on-chip RC/RLC interconnects. ISCAS (4) (2002)
Li Ding, Pinaki Mazumder
Optimal Transistor Tapering for High-Speed CMOS Circuits. DATE (2002)
Li Ding, Pinaki Mazumder, David T. Blaauw
Crosstalk noise estimation using effective coupling capacitance. ISCAS (5) (2002)
Li Ding, David T. Blaauw, Pinaki Mazumder
Efficient crosstalk noise modeling using aggressor and tree reductions. ICCAD (2002)
Li Ding, Pinaki Mazumder
Accurate Estimating Simultaneous Switching Noises by Using Application Specific Device Modeling. DATE (2002)
Qinwei Xu, Pinaki Mazumder
Rational ABCD Modeling of High-Speed Interconnects. VLSI Design (2002)
Tetsuya Uemura, Pinaki Mazumder
Rise time analysis of MOBILE circuit. ISCAS (5) (2002)
Qinwei Xu, Pinaki Mazumder, Mayukh Bhattacharya
Modeling of Nonuniform Interconnects by Using Differential Quadrature Method. VLSI Design (2001)
Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
CMOS implementation of a multiple-valued logic signed-digit full adder based on negative-differentiaI-resistance devices. IEEE J. Solid State Circuits 36 (6) (2001)
Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González, Pinaki Mazumder
A 250-MHz, 32-bit quantum MOS correlator prototype. ICECS (2001)
Li Ding, Pinaki Mazumder, N. Srinivas
A dual-rail static edge-triggered latch. ISCAS (2) (2001)
Mayukh Bhattacharya, Pinaki Mazumder, Ronald J. Lomax
Fd-Tlm Electromagnetic Field Simulation Of High-Speed Iii-V Heterojunction Bipolar Transistor Digital Logic Gates. VLSI Design (2001)
Mayukh Bhattacharya, Pinaki Mazumder
Augmentation of SPICE for simulation of circuits containingresonant tunneling diodes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (1) (2001)
Qinwei Xu, Pinaki Mazumder
Efficient and passive modeling of transmission lines by using differential quadrature method. DATE (2001)
Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta
A physical design tool for built-in self-repairable RAMs. IEEE Trans. Very Large Scale Integr. Syst. 9 (2) (2001)
Qinwei Xu, Pinaki Mazumder, Zheng-Fan Li
Transmission Line Modeling by Modified Method of Characteristics. VLSI Design (2001)
Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices. ISMVL (2000)
Kanad Chakraborty, Pinaki Mazumder
New March Tests for Multiport RAM Devices. J. Electron. Test. 16 (4) (2000)
Alejandro F. González, Pinaki Mazumder
Redundant arithmetic, algorithms and implementations. Integr. 30 (1) (2000)
Mayukh Bhattacharya, Pinaki Mazumder
Convergence Issues in Resonant Tunneling Diode Circuit Simulation. VLSI Design (2000)
Mayukh Bhattacharya, Shriram Kulkarni, Alejandro F. González, Pinaki Mazumder
A prototyping technique for large-scale RTD-CMOS circuits. ISCAS (2000)
Tetsuya Uemura, Pinaki Mazumder
Design and Analysis of a Novel Quantum-MOS Sense Amplifier Circuit. Great Lakes Symposium on VLSI (1999)
Alan C. Seabaugh, Pinaki Mazumder
Special Issue On Quantum Devices And Their Applications. Proc. IEEE 87 (4) (1999)
Patrick Fay, Gary H. Bernstein, David H. Chow, Joel N. Schulman, Pinaki Mazumder, W. Williamson, B. K. Gilbert
Integration of InAs/AlSb/GaSb Resonant Interband Tunneling Diodes with Heterostructure Field-Effect Transistors for Ultra-High-Speed Digital Circuit Applications. Great Lakes Symposium on VLSI (1999)
Kanad Chakraborty, Anurag Gupta, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
A Physical Design Tool for Built-in Self-Repairable Static RAMs. DATE (1999)
Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder
A Silicon Compiler for Fault-Tolerant ROMs. DFT (1998)
Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González
Circuit Design using Resonant Tunneling Diodes. VLSI Design (1998)
Pinaki Mazumder
Analysis of Failures in Deep Submicron SRAM Cells. VTS (1998)
Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder
FTROM: A Silicon Compiler for Fault-tolerant ROMs. Integr. 26 (1-2) (1998)
Jian Ping Sun, George I. Haddad, Pinaki Mazumder, Joel N. Schulman
Resonant tunneling diodes: models and properties. Proc. IEEE 86 (4) (1998)
Mayukh Bhattacharya, Pinaki Mazumder
Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes. Great Lakes Symposium on VLSI (1998)
Pinaki Mazumder
Guest Editorial Special Section On Impacts Of Emerging Technologies On VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. 6 (1) (1998)

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Publication Activity (10 Years)

Top Topics

Top Venues

Pinaki Mazumder