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A 250mV sub-threshold asynchronous 8051microcontroller with a novel 16T SRAM cell for improved reliability in 40nm CMOS.
Jaeyoung Kim
Kwen-Siong Chong
Joseph Sylvester Chang
Pinaki Mazumder
Published in:
ACM Great Lakes Symposium on VLSI (2013)
Keyphrases
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power consumption
cmos technology
low power
low cost
delay insensitive
nm technology
random access memory
single chip
control system
low voltage
real time
data transmission
roc curve
improved algorithm
power reduction
infrared
high speed