Login / Signup

CMOS implementation of a multiple-valued logic signed-digit full adder based on negative-differentiaI-resistance devices.

Alejandro F. GonzálezMayukh BhattacharyaShriram KulkarniPinaki Mazumder
Published in: IEEE J. Solid State Circuits (2001)
Keyphrases
  • multiple valued logic
  • low cost
  • fuzzy control
  • multiple valued
  • circuit design
  • real time
  • neural network