Alejandro F. González

Publication Activity (10 Years)

Years Active: 1997-2005
Publications (10 Years): 0

Publications

Gilberto A. Gutiérrez, Gonzalo Navarro, M. Andrea Rodríguez, Alejandro F. González, José Orellana
A spatio-temporal access method based on snapshots and events. GIS (2005)
Alejandro F. González, Pinaki Mazumder
Comparison of Bistable Circuits Based on Resonant-Tunneling Diodes. VLSI Design (2003)
Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
CMOS implementation of a multiple-valued logic signed-digit full adder based on negative-differentiaI-resistance devices. IEEE J. Solid State Circuits 36 (6) (2001)
Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González, Pinaki Mazumder
A 250-MHz, 32-bit quantum MOS correlator prototype. ICECS (2001)
Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices. ISMVL (2000)
Alejandro F. González, Pinaki Mazumder
Redundant arithmetic, algorithms and implementations. Integr. 30 (1) (2000)
Mayukh Bhattacharya, Shriram Kulkarni, Alejandro F. González, Pinaki Mazumder
A prototyping technique for large-scale RTD-CMOS circuits. ISCAS (2000)
Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González
Circuit Design using Resonant Tunneling Diodes. VLSI Design (1998)
Alejandro F. González, Pinaki Mazumder
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices. IEEE Trans. Computers 47 (9) (1998)
Alejandro F. González, Pinaki Mazumder
Compact Signed-Digit Adder Using Multiple-Valued Logic. ARVLSI (1997)