Login / Signup
Optimal Transistor Tapering for High-Speed CMOS Circuits.
Li Ding
Pinaki Mazumder
Published in:
DATE (2002)
Keyphrases
</>
high speed
low power
frame rate
real time
high speed networks
optimal solution
worst case
circuit design
power dissipation
neural network
genetic algorithm
lower bound
upper bound
optimal design
focal plane
shift register