Tetsuya Uemura

Publication Activity (10 Years)

Years Active: 1990-2007
Publications (10 Years): 0

Publications

Tetsuya Uemura, Takao Marukame, Ken-ichi Matsuda, Masafumi Yamamoto
Four-State Magnetic Random Access Memory and Ternary Content Addressable Memory Using CoFe-Based Magnetic Tunnel Junctions. ISMVL (2007)
Shuichi Toyoda, Noboru Niki, Tetsuya Uemura, Hiromu Nishitani
Clinical support system using information aggregation and visualization for order data. Systems and Computers in Japan 36 (1) (2005)
Tetsuya Uemura, Masafumi Yamamoto
Four-Valued Magnetic Random Access Memory Based on Magneto Tunnel Junction and Resonant Tunneling Diode. J. Multiple Valued Log. Soft Comput. 11 (5-6) (2005)
Tetsuya Uemura, Masafumi Yamamoto
Proposal of Four-Valued MRAM based on MTJ/RTD Structure. ISMVL (2003)
Tetsuya Uemura, Pinaki Mazumder
Rise time analysis of MOBILE circuit. ISCAS (5) (2002)
Tetsuya Uemura, Toshio Baba
A Three-Valued D-Flip-Flop and Shift Register Using Multiple-Junction Surface Tunnel Transistors. ISMVL (2001)
Tetsuya Uemura, Toshio Baba
Demonstration of a Novel Multiple-Valued T-Gate Using Multiple-Junction Surface Tunnel Transistors and Its Application to Three-Valued Data Flip-Flop. ISMVL (2000)
Tetsuya Uemura, Pinaki Mazumder
Design and Analysis of a Novel Quantum-MOS Sense Amplifier Circuit. Great Lakes Symposium on VLSI (1999)
Toshio Baba, Tetsuya Uemura
Development of InGaAs-Based Multiple-Junction Surface Tunnel Transistors for Multiple-Valued Logic Circuits. ISMVL (1998)
Toshio Baba, Tetsuya Uemura
Multiple-Junction Surface Tunnel Transistors for Multiple-Valued Logic Circuits . ISMVL (1997)
Takashi Nagamine, Tetsuya Uemura, Isao Masuda
3D facial image analysis for human identification. ICPR (1) (1992)
Junichi Hoshino, Tetsuya Uemura, Isao Masuda
Region-based reconstruction of an indoor scene using an integration of active and passive sensing techniques. ICCV (1990)