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An Efficient Eligible Error Locator Polynomial Searching Algorithm and Hardware Architecture for One-Pass Chase Decoding of BCH Codes.
Nan Zheng
Pinaki Mazumder
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2017)
Keyphrases
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hardware architecture
learning algorithm
decoding algorithm
computational complexity
neural network
real time
computer vision
probabilistic model
general purpose