Sung-Mo Kang

Publication Activity (10 Years)

Years Active: 1982-2022
Publications (10 Years): 13

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

CoRR

IEEE Trans. Ind. Electron.

CCTA

Publications

Xiaoyuan Wang, Zhiru Wu, Pengfei Zhou, Herbert Ho-Ching Iu, Sung-Mo Kang, Jason Kamran Eshraghian
FPGA Synthesis of Ternary Memristor-CMOS Decoders for Active Matrix Microdisplays. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (9) (2022)
Peng Zhou, Jason K. Eshraghian, Dong-Uk Choi, Sung-Mo Kang
SPICEprop: Backpropagating Errors Through Memristive Spiking Neural Networks. CoRR (2022)
Peng Zhou, Dong-Uk Choi, Jason Kamran Eshraghian, Sung-Mo Kang
A Fully Memristive Spiking Neural Network with Unsupervised Learning. ISCAS (2022)
Peng Zhou, Jason Kamran Eshraghian, Dong-Uk Choi, Wei D. Lu, Sung-Mo Kang
Gradient-based Neuromorphic Learning on Dynamical RRAM Arrays. CoRR (2022)
Sung-Mo Kang, Chan-Jun Chun, Seung-Bo Shim, Seung-Ki Ryu, Jong-Dae Baek
Real Time Image Processing System for Detecting Infrastructure Damage: Crack. ICCE (2019)
Byung-Hun Lee, Sung-Mo Kang, Hyo-Sung Ahn
Distributed Orientation Estimation in SO(d) and Applications to Formation Control and Network Localization. IEEE Trans. Control. Netw. Syst. 6 (4) (2019)
Yoo-Bin Bae, Young-Hun Lim, Sung-Mo Kang, Hyo-Sung Ahn
Disturbance Attenuation in Distance-Based Formation Control: A Linear Matrix Inequality Approach. CCTA (2018)
Sung-Mo Kang, Jae-Gyeong Lee, Hyo-Sung Ahn
Shape and Orientation Control of Moving Formation with Local Measurements in Three-Dimensional Space. CCTA (2018)
Sung-Mo Kang, Hyo-Sung Ahn
Shape and orientation control of moving formation in multi-agent systems without global reference frame. Autom. 92 (2018)
Sung-Mo Kang, Jin-Hee Son, Hyo-Sung Ahn
Global convergence of formation without global information in three-dimensional space. ASCC (2017)
Sung-Mo Kang, Myoung-Chul Park, Hyo-Sung Ahn
Distance-Based Cycle-Free Persistent Formation: Global Convergence and Experimental Test With a Group of Quadcopters. IEEE Trans. Ind. Electron. 64 (1) (2017)
Sung-Mo Kang, Hyo-Sung Ahn
Design and Realization of Distributed Adaptive Formation Control Law for Multi-Agent Systems With Moving Leader. IEEE Trans. Ind. Electron. 63 (2) (2016)
Le Zheng, Sangho Shin, G. Scott Lloyd, Maya B. Gokhale, Kyungmin Kim, Sung-Mo Kang
RRAM-based TCAMs for pattern search. ISCAS (2016)
Taegeun Yoo, Yun-Hwan Jung, Hong Chang Yeoh, Yong Sin Kim, Sung-Mo Kang, Kwang-Hyun Baek
21.3 A 2GHz 130mW direct-digital frequency synthesizer with a nonlinear DAC in 55nm CMOS. ISSCC (2014)
Sung-Mo Kang, Myoung-Chul Park, Byung-Hun Lee, Hyo-Sung Ahn
Distance-based formation control with a single moving leader. ACC (2014)
Taegeun Yoo, Hong Chang Yeoh, Yun-Hwan Jung, Seong Jin Cho, Yong Sin Kim, Sung-Mo Kang, Kwang-Hyun Baek
A 2 GHz 130 mW Direct-Digital Frequency Synthesizer With a Nonlinear DAC in 55 nm CMOS. IEEE J. Solid State Circuits 49 (12) (2014)
Amirkoushyar Ziabari, Je-Hyoung Park, Ehsan K. Ardestani, Jose Renau, Sung-Mo Kang, Ali Shakouri
Power Blurring: Fast Static and Transient Thermal Analysis Method for Packaged Integrated Circuits and Power Devices. IEEE Trans. Very Large Scale Integr. Syst. 22 (11) (2014)
Sangho Shin, Kyungmin Kim, Sung-Mo Kang
Resistive Computing: Memristors-Enabled Signal Multiplication. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2013)
Sung-Mo Kang, Yun-Tae Kim, Hyo-Sung Ahn
Sliding mode controller design for spacecraft with manipulator. ASCC (2013)
Sangho Shin, Kyungmin Kim, Sung-Mo Kang
Memristive computing- multiplication and correlation. ISCAS (2012)
Pinaki Mazumder, Sung-Mo Kang, Rainer Waser
Memristors: Devices, Models, and Applications [Scanning the Issue]. Proc. IEEE 100 (6) (2012)
Sangho Shin, Sung-Mo Kang
Fast settling frequency synthesizer with two-point channel control paths. Int. J. Circuit Theory Appl. 40 (10) (2012)
Yong Sin Kim, Sung-Mo Kang, Roland Winston
Maximizing power harvest in a distributed photovoltaic system. ISCAS (2012)
Sangho Shin, Kyungmin Kim, Sung-Mo Kang
Analysis of Passive Memristive Devices Array: Data-Dependent Statistical Model and Self-Adaptable Sense Resistance for RRAMs. Proc. IEEE 100 (6) (2012)
Kyosun Kim, Sangho Shin, Sung-Mo Kang
Stateful logic pipeline architecture. ISCAS (2011)
Sangho Shin, Kyungmin Kim, Sung-Mo Kang
Complementary structure of memristive devices based passive memory arrays. ISCAS (2011)
Ji-Hye Bong, Kwan-Hee Jo, Kyeong-Sik Min, Sung-Mo Kang
Oxide-Tunneling Leakage Suppressed SRAM for Sub-65-nm Very Large Scale Integrated Circuits. J. Low Power Electron. 7 (1) (2011)
Sangho Shin, Kyosun Kim, Sung-Mo Kang
Reconfigurable Stateful nor Gate for Large-Scale Logic-Array Integrations. IEEE Trans. Circuits Syst. II Express Briefs (7) (2011)
Kyosun Kim, Sangho Shin, Sung-Mo Kang
Field Programmable Stateful Logic Array. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (12) (2011)
Sangho Shin, Kyungmin Kim, Sung-Mo Kang
Compact Models for Memristors Based on Charge-Flux Constitutive Relationships. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (4) (2010)
Sangho Shin, Kyungmin Kim, Sung-Mo Kang
Data-Dependent Statistical Memory Model for Passive Array of Memristive Devices. IEEE Trans. Circuits Syst. II Express Briefs (12) (2010)
Kwan-Hee Jo, Ji-Hye Bong, Kyeong-Sik Min, Sung-Mo Kang
A compact Verilog-A model for Multi-Level-Cell Phase-change RAMs. IEICE Electron. Express 6 (19) (2009)
Ji-Hye Bong, Yong-Jin Kwon, Kyeong-Sik Min, Sung-Mo Kang
New word-line driving scheme for suppressing oxide-tunneling leakage in sub-65-nm SRAMs. ISQED (2009)
Sangho Shin, Seokoh Yun, Sanghyun Cho, Jongmoon Kim, Minseok Kang, Wonkab Oh, Sung-Mo Kang
0.18um CMOS integrated chipset for 5.8GHz DSRC systems with +10dBm output power. ISCAS (2008)
Je-Hyoung Park, Ali Shakouri, Sung-Mo Kang
Fast Evaluation Method for Transient Hot Spots in VLSI ICs in Packages. ISQED (2008)
Jae-Jin Jung, Kwang-Hyun Baek, Shin-Il Lim, Suki Kim, Sung-Mo Kang
Design of a 6 bit 1.25 GS/s DAC for WPAN. ISCAS (2008)
Yong Sin Kim, Sung-Mo Kang
A 8-Gb/s/pin current mode multi-level simultaneous bidirectional I/O. ISCAS (2008)
Yong Sin Kim, Sung-Mo Kang
Programmable High Speed Multi-Level Simultaneous Bidirectional I/O. ISQED (2007)
Sangho Shin, Kyungmin Kim, Kwyro Lee, Sung-Mo Kang
Fast- Frequency Offset Cancellation Loop Using Low-IF Receiver and Fractional-N PLL. IEEE Trans. Circuits Syst. II Express Briefs (3) (2007)
Andrew B. Kahng, Sung-Mo Kang, Wei Li, Bao Liu
Analytical thermal placement for VLSI lifetime improvement and minimum performance variation. ICCD (2007)
Sangho Shin, Kwyro Lee, Sung-Mo Kang
2.4GHz ZigBee radio architecture with fast frequency offset cancellation loop. ISCAS (2006)
Sangho Shin, Kwyro Lee, Sung-Mo Kang
Low-power 2.4GHz CMOS frequency synthesizer with differentially controlled MOS varactors. ISCAS (2006)
Yong Sin Kim, Sangho Shin, Sung-Mo Kang
A 4-Gb/s/pin current mode 4-level simultaneous bidirectional I/O with current mismatch calibration. ISCAS (2006)
Jeng-Liang Tsai, Charlie Chung-Ping Chen, Guoqiang Chen, Brent Goplen, Haifeng Qian, Yong Zhan, Sung-Mo Kang, Martin D. F. Wong, Sachin S. Sapatnekar
Temperature-Aware Placement for SOCs. Proc. IEEE 94 (8) (2006)
Ge Yang, Yong Sin Kim, Sung-Mo Kang
Current mode multi-level simultaneous bidirectional I/O scheme for chip-to-chip communications. ISCAS (6) (2005)
Ge Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang
A 32-bit carry lookahead adder using dual-path all-N logic. IEEE Trans. Very Large Scale Integr. Syst. 13 (8) (2005)
Sangho Shin, Kwyro Lee, Sung-Mo Kang
3.48mW 2.4GHz range Frequency Synthesizer Architecture with Two-Point Channel Control for Fast Settling Performance. SoCC (2005)
Sung-Mo Kang
Message from the General Chair. SoCC (2004)
Ge Yang, Zhongda Wang, Sung-Mo Kang
Leakage-Proof Domino Circuit Design for Deep Sub-100nm Technologies. VLSI Design (2004)
Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang
Design of ESD power protection with diode structures for mixed-power supply systems. IEEE J. Solid State Circuits 39 (1) (2004)
Ge Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang
A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic. ISCAS (2) (2004)
In-Chul Hwang, Chulwoo Kim, Sung-Mo Kang
A CMOS self-regulating VCO with low supply sensitivity. IEEE J. Solid State Circuits 39 (1) (2004)
Ge Yang, Zhongda Wang, Sung-Mo Kang
Low Power and High Performance Circuit Techniques for High Fan-In Dynamic Gates. ISQED (2004)
Ki-Wook Kim, Seong-Ook Jung, Taewhan Kim, Sung-Mo Kang
Minimum delay optimization for domino circuits - a coupling-aware approach. ACM Trans. Design Autom. Electr. Syst. 8 (2) (2003)
Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang
An Efficient Calibration Technique for Systematic Current-Mismatch of D/A Converters. ISVLSI (2003)
Yong Sin Kim, Soo Hwan Kim, Kwang-Hyun Baek, Suki Kim, Sung-Mo Kang
Multiple Trigonometric Approximation of Sine-Amplitude with Small ROM Size for Direct Digital Frequency Synthesizers. VLSI Design (2003)
Jaesik Lee, Ki-Wook Kim, Yoonjong Huh, Peter Bendix, Sung-Mo Kang
Chip-level charged-device modeling and simulation in CMOS integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (1) (2003)
Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu, Sung-Mo Kang
Noise-aware interconnect power optimization in domino logic synthesis. IEEE Trans. Very Large Scale Integr. Syst. 11 (1) (2003)
Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang
Energy-efficient skewed static logic with dual Vt: design and synthesis. IEEE Trans. Very Large Scale Integr. Syst. 11 (1) (2003)
Kwang-Hyun Baek, Myung-Jun Choe, Edward Merlo, Sung-Mo Kang
1-GS/s, 12-bit SiGe BiCMOS D/A converter for high-speed DDFs. ISCAS (1) (2003)
Sung-Mo Kang
Elements of low power design for integrated systems. ISLPED (2003)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Timing constraints for domino logic gates with timing-dependent keepers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (1) (2003)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Dual Threshold Voltage Domino Logic Synthesis for High Performance with Noise and Power Constrain. DATE (2002)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Optimal Timing for Skew-Tolerant High-Speed Domino Logic. ISVLSI (2002)
Chulwoo Kim, In-Chul Hwang, Sung-Mo Kang
A low-power small-area ±7.28-ps-jitter 1-GHz DLL-based clock generator. IEEE J. Solid State Circuits 37 (11) (2002)
Jaesik Lee, Ki-Wook Kim, Sung-Mo Kang
VeriCDF: a new verification methodology for charged device failures. DAC (2002)
Sung-Mo Kang
On-chip thermal engineering for peta-scale integration. ISPD (2002)
Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang
A low-voltage high-speed BiCMOS current switch with enhanced-spectral performance. ISCAS (5) (2002)
Ki-Wook Kim, Taewhan Kim, C. L. Liu, Sung-Mo Kang
Domino logic synthesis based on implication graph. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (2) (2002)
Chulwoo Kim, Sung-Mo Kang
A low-swing clock double-edge triggered flip-flop. IEEE J. Solid State Circuits 37 (5) (2002)
Robert K. Grube, Qi Wang, Sung-Mo Kang
Design limitations in deep sub-0.1µm CMOS SRAM. ACM Great Lakes Symposium on VLSI (2002)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Low-swing clock domino logic incorporating dual supply and dual threshold voltages. DAC (2002)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
domino logic. IEEE Trans. Very Large Scale Integr. Syst. 10 (5) (2002)
Ki-Wook Kim, Taewhan Kim, TingTing Hwang, Sung-Mo Kang, C. L. Liu
Logic transformation for low-power synthesis. ACM Trans. Design Autom. Electr. Syst. 7 (2) (2002)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Noise constrained power optimization for dual VT domino logic. ISCAS (4) (2001)
Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang
Understanding and Addressing the Noise Induced By Electrostatic Discharge in Multiple Power Supply Systems. ICCD (2001)
Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang
Energy-efficient skewed static logic design with dual Vt. ISCAS (4) (2001)
Q. Li, Yoonjong Huh, Jau-Wen Chen, Peter Bendix, Sung-Mo Kang
ESD design rule checker. ISCAS (5) (2001)
Ki-Wook Kim, Sung-Mo Kang
Crosstalk noise minimization in domino logic design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (9) (2001)
Q. Li, Sung-Mo Kang
Trapezoid-to-simple polygon recomposition for resistance extraction. ISCAS (5) (2001)
Seong-Ook Jung, Seung-Moon Yoo, Ki-Wook Kim, Sung-Mo Kang
Skew-tolerant high-speed (STHS) domino logic. ISCAS (4) (2001)
Seung-Moon Yoo, Seong-Ook Jung, Sung-Mo Kang
Low cost and high efficiency BIST scheme with 2-level LFSR and ATPT. ISCAS (4) (2001)
Jaesik Lee, Yoonjong Huh, Peter Bendix, Sung-Mo Kang
Design-for-ESD-reliability for high-frequency I/O interface circuits in deep-submicron CMOS technology. ISCAS (4) (2001)
Ki-Wook Kim, Seong-Ook Jung, Sung-Mo Kang
Coupling-aware minimum delay optimization for domino logic circuits. ISCAS (5) (2001)
José E. Schutt-Ainé, Sung-Mo Kang
Interconnections-addressing the next challenge of IC technology (part I: integration and packaging trends). Proc. IEEE 89 (4) (2001)
Q. Li, Yoonjong Huh, Jau-Wen Chen, Peter Bendix, Sung-Mo Kang
Full chip ESD design rule checking. ISCAS (5) (2001)
Edward Ahn, Seung-Moon Yoo, Sung-Mo Kang
Effective algorithms for cache-level compression. ACM Great Lakes Symposium on VLSI (2001)
Chulwoo Kim, Sung-Mo Kang
A low-power reduced swing single clock flip-flop. ISCAS (4) (2001)
Seung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang
New current-mode sense amplifiers for high density DRAM and PIM architectures. ISCAS (4) (2001)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Transistor sizing for reliable domino logic design in dual threshold voltage technologies. ACM Great Lakes Symposium on VLSI (2001)
José E. Schutt-Ainé, Sung-Mo Kang
Scanning the issue interconnections - addressing the next challenge of IC technology (part II: design, characterization, and modeling). Proc. IEEE 89 (5) (2001)
Ki-Wook Kim, Seong-Ook Jung, Prashant Saxena, C. L. Liu, Sung-Mo Kang
Coupling Delay Optimization by Temporal Decorrelation using Dual Threshold Voltage Technique. DAC (2001)
Jinghong Chen, Sung-Mo Kang
Model-order reduction of nonlinear MEMS devices through arclength-based Karhunen-Loeve decomposition. ISCAS (3) (2001)
Seung-Moon Yoo, Seong-Ook Jung, Sung-Mo Kang
2-level LFSR scheme with asynchronous test pattern transfer for low cost and high efficiency build-in-self-test. ACM Great Lakes Symposium on VLSI (2001)
Yi-Kan Cheng, Sung-Mo Kang
A temperature-aware simulation environment for reliable ULSI chipdesign. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (10) (2000)
Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang
Parallel dynamic logic (PDL) with speed-enhanced skewed static (SSS) logic. ISCAS (2000)
Stefan Bucheli, Jay R. Moorman, John W. Lockwood, Sung-Mo Kang
Compensation modeling for QoS support on a wireless network. GLOBECOM (2000)
Ching-Han Tsai, Sung-Mo Kang
Cell-level placement for improving substrate thermal distribution. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (2) (2000)
Jay R. Moorman, John W. Lockwood, Sung-Mo Kang
Real-time prioritized call admission control in a base station scheduler. WOWMOM (2000)
Qiao Li, Sung-Mo Kang
Efficient algorithms for polygon to trapezoid decomposition and trapezoid corner stitching. ACM Great Lakes Symposium on VLSI (2000)

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Publication Activity (10 Years)

Top Topics

Top Venues

Sung-Mo Kang