Login / Signup

Coupling-aware minimum delay optimization for domino logic circuits.

Ki-Wook KimSeong-Ook JungSung-Mo Kang
Published in: ISCAS (5) (2001)
Keyphrases
  • logic circuits
  • power dissipation
  • optimization problems
  • optimization algorithm
  • low power
  • real time
  • logic synthesis
  • gate array
  • dynamic programming
  • high speed
  • efficient implementation