Ki-Wook Kim

Publication Activity (10 Years)

Years Active: 1996-2021
Publications (10 Years): 4

Top Topics

Wireless Medium

Provably Secure

Top Venues

Mob. Inf. Syst.

Publications

Cheonyong Kim, Joobum Kim, Ki-Hyeon Kim, Sang-Kwon Lee, Ki-Wook Kim, Syed Asif Raza Shah, Young-Hoon Goo
ScienceIoT: Evolution of the Wireless Infrastructure of KREONET. Sensors 21 (17) (2021)
Ki-Wook Kim, Sung-Gi Min, Youn-Hee Han
In-Network Data Processing in Software-Defined IoT with a Programmable Data Plane. Mob. Inf. Syst. 2018 (2018)
Ki-Wook Kim, Sung-Gi Min, Youn-Hee Han
A programmable data plane to support in-network data processing in software-defined IoT. ICTC (2017)
Ki-Wook Kim, Youn-Hee Han, Sung-Gi Min
An Authentication and Key Management Mechanism for Resource Constrained Devices in IEEE 802.11-based IoT Access Networks. Sensors 17 (10) (2017)
Ki-Wook Kim, Kwang-Ryoul Kim, Sung-Gi Min
Distributed cluster head election algorithm using local energy estimation. ICHIT (2009)
Chun-Gi Lyuh, Taewhan Kim, Ki-Wook Kim
Coupling-aware high-level interconnect synthesis [IC layout]. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (1) (2004)
Ki-Wook Kim, Seong-Ook Jung, Taewhan Kim, Sung-Mo Kang
Minimum delay optimization for domino circuits - a coupling-aware approach. ACM Trans. Design Autom. Electr. Syst. 8 (2) (2003)
Ki-Wook Kim, Seong-Ook Jung, Taewhan Kim, Prashant Saxena, C. L. Liu, S.-M. S. Kang
Coupling delay optimization by temporal decorrelation using dual threshold voltage technique. IEEE Trans. Very Large Scale Integr. Syst. 11 (5) (2003)
Jaesik Lee, Ki-Wook Kim, Yoonjong Huh, Peter Bendix, Sung-Mo Kang
Chip-level charged-device modeling and simulation in CMOS integrated circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (1) (2003)
Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu, Sung-Mo Kang
Noise-aware interconnect power optimization in domino logic synthesis. IEEE Trans. Very Large Scale Integr. Syst. 11 (1) (2003)
Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang
Energy-efficient skewed static logic with dual Vt: design and synthesis. IEEE Trans. Very Large Scale Integr. Syst. 11 (1) (2003)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Timing constraints for domino logic gates with timing-dependent keepers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (1) (2003)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Dual Threshold Voltage Domino Logic Synthesis for High Performance with Noise and Power Constrain. DATE (2002)
Chun-Gi Lyuh, Taewhan Kim, Ki-Wook Kim
Coupling-aware high-level interconnect synthesis for low power. ICCAD (2002)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Optimal Timing for Skew-Tolerant High-Speed Domino Logic. ISVLSI (2002)
Jaesik Lee, Ki-Wook Kim, Sung-Mo Kang
VeriCDF: a new verification methodology for charged device failures. DAC (2002)
Ki-Wook Kim, Taewhan Kim, C. L. Liu, Sung-Mo Kang
Domino logic synthesis based on implication graph. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (2) (2002)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Low-swing clock domino logic incorporating dual supply and dual threshold voltages. DAC (2002)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
domino logic. IEEE Trans. Very Large Scale Integr. Syst. 10 (5) (2002)
Ki-Wook Kim, Taewhan Kim, TingTing Hwang, Sung-Mo Kang, C. L. Liu
Logic transformation for low-power synthesis. ACM Trans. Design Autom. Electr. Syst. 7 (2) (2002)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Noise constrained power optimization for dual VT domino logic. ISCAS (4) (2001)
Chulwoo Kim, Ki-Wook Kim, Sung-Mo Kang
Energy-efficient skewed static logic design with dual Vt. ISCAS (4) (2001)
Ki-Wook Kim, Sung-Mo Kang
Crosstalk noise minimization in domino logic design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (9) (2001)
Seong-Ook Jung, Seung-Moon Yoo, Ki-Wook Kim, Sung-Mo Kang
Skew-tolerant high-speed (STHS) domino logic. ISCAS (4) (2001)
Ki-Wook Kim, Seong-Ook Jung, Sung-Mo Kang
Coupling-aware minimum delay optimization for domino logic circuits. ISCAS (5) (2001)
Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang
Transistor sizing for reliable domino logic design in dual threshold voltage technologies. ACM Great Lakes Symposium on VLSI (2001)
Ki-Wook Kim, Seong-Ook Jung, Prashant Saxena, C. L. Liu, Sung-Mo Kang
Coupling Delay Optimization by Temporal Decorrelation using Dual Threshold Voltage Technique. DAC (2001)
Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu, Sung-Mo Kang
Noise-aware power optimization for on-chip interconnect. ISLPED (2000)
Ki-Wook Kim, Unni Narayanan, Sung-Mo Kang
Domino logic synthesis minimizing crosstalk. DAC (2000)
Ki-Wook Kim, Kwang-Hyun Baek, Naresh R. Shanbhag, C. L. Liu, Sung-Mo Kang
Coupling-Driven Signal Encoding Scheme for Low-Power Interface Design. ICCAD (2000)
Ki-Wook Kim, C. L. Liu, Sung-Mo Kang
Implication graph based domino logic synthesis. ICCAD (1999)
Ki-Wook Kim, Sung-Mo Kang, TingTing Hwang, C. L. Liu
Logic Transformation for Low Power Synthesis. DATE (1999)
Ki-Wook Kim, Ki-Byoung Kim, Hyoung-Joo Kim
VIRON: An Annotation-Based Video Information Retrieval System. COMPSAC (1996)