A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic.
Ge YangSeong-Ook JungKwang-Hyun BaekSoo Hwan KimSuki KimSung-Mo KangPublished in: ISCAS (2) (2004)
Keyphrases
- low complexity
- low power
- logic circuits
- high speed
- power consumption
- low cost
- single chip
- high power
- gate array
- delay insensitive
- vlsi architecture
- power dissipation
- motion estimation
- low power consumption
- wireless transmission
- nm technology
- cmos technology
- mixed signal
- random access memory
- vlsi circuits
- shortest path
- digital signal processing
- analog to digital converter
- power reduction
- image sensor
- hardware implementation