A low-power reduced swing single clock flip-flop.
Chulwoo KimSung-Mo KangPublished in: ISCAS (4) (2001)
Keyphrases
- low power
- power consumption
- high speed
- power dissipation
- low cost
- cmos technology
- single chip
- low power consumption
- digital signal processing
- real time
- power saving
- logic circuits
- high power
- flip flops
- wireless transmission
- power reduction
- vlsi architecture
- vlsi circuits
- image formation
- hardware and software
- image sequences