A low-power small-area ±7.28-ps-jitter 1-GHz DLL-based clock generator.
Chulwoo KimIn-Chul HwangSung-Mo KangPublished in: IEEE J. Solid State Circuits (2002)
Keyphrases
- low power
- high speed
- power consumption
- low cost
- single chip
- low power consumption
- clock frequency
- wireless transmission
- cmos technology
- vlsi architecture
- power saving
- high power
- logic circuits
- digital signal processing
- image sensor
- vlsi circuits
- image processing
- power reduction
- delay insensitive
- packet loss
- signal processor
- ultra low power