V. Mohammed Zackriya

Publication Activity (10 Years)

Years Active: 2013-2021
Publications (10 Years): 5

Top Topics

Physical Design

Content Addressable Memory

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

J. Circuits Syst. Comput.

Publications

Prashanth Mohan, Oguz Atli, Onur O. Kibar, V. Mohammed Zackriya, Larry T. Pileggi, Ken Mai
Top-down Physical Design of Soft Embedded FPGA Fabrics. FPGA (2021)
Joseph Sweeney, V. Mohammed Zackriya, Samuel Pagliarini, Lawrence T. Pileggi
Latch-Based Logic Locking. HOST (2020)
Mehmet Meric Isgenc, Mayler G. A. Martins, V. Mohammed Zackriya, Samuel N. Pagliarini, Lawrence T. Pileggi
Logic IP for Low-Cost IC Design in Advanced CMOS Nodes. IEEE Trans. Very Large Scale Integr. Syst. 28 (2) (2020)
V. Mohammed Zackriya, Harish M. Kittur
Precharge-Free, Low-Power Content-Addressable Memory. IEEE Trans. Very Large Scale Integr. Syst. 24 (8) (2016)
V. Mohammed Zackriya, Harish M. Kittur
Low Energy Metric Content Addressable Memory (CAM) with Multi Voltage Matchline Segments. J. Circuits Syst. Comput. 25 (2) (2016)
V. Mohammed Zackriya, John Reuben, Ashim Harsh, Harish M. Kittur
Low Power fractional-n frequency Divider with Improved Resolution. J. Circuits Syst. Comput. 23 (8) (2014)
V. Mohammed Zackriya, Harish M. Kittur
Selective Match-Line Energizer Content Addressable Memory(SMLE -CAM). CoRR (2014)
John Reuben, V. Mohammed Zackriya, Salma Nashit, Harish M. Kittur
Capacitance driven clock mesh synthesis to minimize skew and power dissipation. IEICE Electron. Express 10 (24) (2013)