Harish M. Kittur

Publication Activity (10 Years)

Years Active: 2011-2017
Publications (10 Years): 3

Top Topics

Subgraph Isomorphism

Power Dissipation

Content Addressable Memory

Vlsi Architecture

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEICE Electron. Express

J. Circuits Syst. Comput.

Publications

Mohammed Zackriya V, Harish M. Kittur
Content Addressable Memory - Early Predict and Terminate Precharge of Match-Line. IEEE Trans. Very Large Scale Integr. Syst. 25 (1) (2017)
V. Mohammed Zackriya, Harish M. Kittur
Precharge-Free, Low-Power Content-Addressable Memory. IEEE Trans. Very Large Scale Integr. Syst. 24 (8) (2016)
V. Mohammed Zackriya, Harish M. Kittur
Low Energy Metric Content Addressable Memory (CAM) with Multi Voltage Matchline Segments. J. Circuits Syst. Comput. 25 (2) (2016)
R. Sakthivel, M. Vanitha, Harish M. Kittur
Low power high throughput reconfigurable stream cipher hardware VLSI architectures. Int. J. Inf. Comput. Secur. 6 (1) (2014)
V. Mohammed Zackriya, John Reuben, Ashim Harsh, Harish M. Kittur
Low Power fractional-n frequency Divider with Improved Resolution. J. Circuits Syst. Comput. 23 (8) (2014)
V. Mohammed Zackriya, Harish M. Kittur
Selective Match-Line Energizer Content Addressable Memory(SMLE -CAM). CoRR (2014)
R. Sakthivel, Harish M. Kittur
Energy Efficient Low Area Error Tolerant Adder with Higher Accuracy. Circuits Syst. Signal Process. 33 (8) (2014)
John Reuben, Harish M. Kittur, Mohd Shoaib
A novel clock generation algorithm for system-on-chip based on least common multiple. Comput. Electr. Eng. 40 (7) (2014)
John Reuben, V. Mohammed Zackriya, Salma Nashit, Harish M. Kittur
Capacitance driven clock mesh synthesis to minimize skew and power dissipation. IEICE Electron. Express 10 (24) (2013)
B. Ramkumar, Harish M. Kittur
Faster and Energy-Efficient Signed Multipliers. VLSI Design 2013 (2013)
R. Sakthivel, Harish M. Kittur
Design of dynamically reconfigurable fully optimized low power FFT architecture for MC-CDMA receiver. IEICE Electron. Express 10 (12) (2013)
R. Sakthivel, K. Sravanthi, Harish M. Kittur
Low power energy efficient pipelined multiply-accumulate architecture. ICACCI (2012)
B. Ramkumar, Harish M. Kittur
Low-Power and Area-Efficient Carry Select Adder. IEEE Trans. Very Large Scale Integr. Syst. 20 (2) (2012)
V. Sreedeep, B. Ramkumar, Harish M. Kittur
Faster and Low Power Twin Precision Multiplier CoRR (2011)
B. Ramkumar, Harish M. Kittur
Optimal Final Carry Propagate Adder Design for Parallel Multipliers CoRR (2011)
B. Ramkumar, Harish M. Kittur
Faster Energy Efficient Column Compression Multiplication CoRR (2011)