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Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator using In-Situ Processing-In-SRAM.
Khalid Al-Hawaj
Olalekan Afuye
Shady Agwa
Alyssa B. Apsel
Christopher Batten
Published in:
ISCAS (2020)
Keyphrases
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bit parallel
pattern matching
regular expressions
random access memory
compute intensive
data processing
general purpose
low cost
real time
databases
power consumption
hardware implementation
object oriented
database
data transmission
random access
field programmable gate array
power reduction