Yakun Sophia Shao

Publication Activity (10 Years)

Years Active: 2013-2024
Publications (10 Years): 46

Top Topics

Design Space Exploration

Constrained Optimization

Commercial Products

Top Venues

Publications

Xiaoyu Huang, Yufeng Chi, Ruofeng Wang, Zhongyu Li, Xue Bin Peng, Yakun Sophia Shao, Borivoje Nikolic, Koushil Sreenath
DiffuseLoco: Real-Time Legged Locomotion Control with Diffusion from Offline Datasets. CoRR (2024)
Yakun Sophia Shao
Next-Generation Domain-Specific Accelerators: From Hardware to System. CICC (2024)
Coleman Hooper, Sehoon Kim, Hiva Mohammadzadeh, Michael W. Mahoney, Yakun Sophia Shao, Kurt Keutzer, Amir Gholami
KVQuant: Towards 10 Million Context Length LLM Inference with KV Cache Quantization. CoRR (2024)
Joonho Whangbo, Edwin Lim, Chengyi Lux Zhang, Kevin Anderson, Abraham Gonzalez, Raghav Gupta, Nivedha Krishnakumar, Sagar Karandikar, Borivoje Nikolic, Yakun Sophia Shao, Krste Asanovic
FireAxe: Partitioned FPGA-Accelerated Simulation of Large-Scale RTL Designs. ISCA (2024)
Coleman Hooper, Sehoon Kim, Hiva Mohammadzadeh, Hasan Genc, Kurt Keutzer, Amir Gholami, Yakun Sophia Shao
SPEED: Speculative Pipelined Execution for Efficient Decoding. CoRR (2023)
Yuto Nishida, Sahil Bhatia, Shadaj Laddad, Hasan Genc, Yakun Sophia Shao, Alvin Cheung
Code Transpilation for Hardware Accelerators. CoRR (2023)
Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. CoRR (2023)
Masum Hossain, Arijit Raychowdhury, Sanu K. Mathew, Yakun Sophia Shao, Yih Wang
Guest Editorial Introduction to the Special Issue on the 2022 IEEE International Solid-State Circuits Conference (ISSCC). IEEE J. Solid State Circuits 58 (1) (2023)
Sehoon Kim, Coleman Hooper, Thanakul Wattanawong, Minwoo Kang, Ruohan Yan, Hasan Genc, Grace Dinh, Qijing Huang, Kurt Keutzer, Michael W. Mahoney, Yakun Sophia Shao, Amir Gholami
Full Stack Optimization of Transformer Inference: a Survey. CoRR (2023)
Sagar Karandikar, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan
CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems. ISCA (2023)
Seah Kim, Hasan Genc, Vadim Vadimovich Nikiforov, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
MoCA: Memory-Centric, Adaptive Execution for Multi-Tenant Deep Neural Networks. HPCA (2023)
Charles Hong, Qijing Huang, Grace Dinh, Mahesh Subedar, Yakun Sophia Shao
DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators. MICRO (2023)
Seah Kim, Jerry Zhao, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
AuRORA: Virtualized Accelerator Orchestration for Multi-Tenant Workloads. MICRO (2023)
Dima Nikiforov, Shengjun Chris Dong, Chengyi Lux Zhang, Seah Kim, Borivoje Nikolic, Yakun Sophia Shao
RoSÉ: A Hardware-Software Co-Simulation Infrastructure Enabling Pre-Silicon Full-Stack Robotics SoC Evaluation. ISCA (2023)
Alisha Menon, Anirudh Natarajan, Reva Agashe, Daniel Sun, Melvin Aristio, Harrison Liew, Yakun Sophia Shao, Jan M. Rabaey
Efficient emotion recognition using hyperdimensional computing with combinatorial channel encoding and cellular automata. Brain Informatics 9 (1) (2022)
Qijing Huang, Charles Hong, John Wawrzynek, Mahesh Subedar, Yakun Sophia Shao
Learning A Continuous and Reconstructible Latent Space for Hardware Accelerator Design. ISPASS (2022)
Abraham Gonzalez, Jerry Zhao, Ben Korpan, Hasan Genc, Colin Schmidt, John Charles Wright, Ayan Biswas, Alon Amid, Farhana Sheikh, Anton Sorokin, Sirisha Kale, Mani Yalamanchi, Ramya Yarlagadda, Mark Flannigan, Larry Abramowitz, Elad Alon, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
106.1 GOPS/W Heterogeneous RISC-V Multi-Core Multi-Accelerator SoC in Low-Power 22nm FinFET. ESSCIRC (2021)
Qijing Huang, Minwoo Kang, Grace Dinh, Thomas Norell, Aravind Kalaiah, James Demmel, John Wawrzynek, Yakun Sophia Shao
CoSA: Scheduling by Constrained Optimization for Spatial Accelerators. CoRR (2021)
Jingyi Xu, Sehoon Kim, Borivoje Nikolic, Yakun Sophia Shao
Memory-Efficient Hardware Performance Counters with Approximate-Counting Algorithms. ISPASS (2021)
Qijing Huang, Aravind Kalaiah, Minwoo Kang, James Demmel, Grace Dinh, John Wawrzynek, Thomas Norell, Yakun Sophia Shao
CoSA: Scheduling by Constrained Optimization for Spatial Accelerators. ISCA (2021)
Hasan Genc, Seah Kim, Alon Amid, Ameer Haj-Ali, Vighnesh Iyer, Pranav Prakash, Jerry Zhao, Daniel Grubb, Harrison Liew, Howard Mao, Albert J. Ou, Colin Schmidt, Samuel Steffl, John Charles Wright, Ion Stoica, Jonathan Ragan-Kelley, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration. DAC (2021)
Alon Amid, Albert J. Ou, Krste Asanovic, Yakun Sophia Shao, Borivoje Nikolic
Vertically Integrated Computing Labs Using Open-Source Hardware Generators and Cloud-Hosted FPGAs. ISCAS (2021)
Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Stephen W. Keckler, Zhengya Zhang
SNAP: An Efficient Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference. IEEE J. Solid State Circuits 56 (2) (2021)
Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
Simba: scaling deep-learning inference with chiplet-based architecture. Commun. ACM 64 (6) (2021)
Alisha Menon, Anirudh Natarajan, Reva Agashe, Daniel Sun, Melvin Aristio, Harrison Liew, Yakun Sophia Shao, Jan M. Rabaey
Efficient emotion recognition using hyperdimensional computing with combinatorial channel encoding and cellular automata. CoRR (2021)
David A. Patterson, Yakun Sophia Shao
Commercial Products. IEEE Micro 40 (6) (2020)
Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. IEEE Micro 40 (4) (2020)
Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm. IEEE J. Solid State Circuits 55 (4) (2020)
Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic
Invited: Chipyard - An Integrated SoC Research and Implementation Environment. DAC (2020)
Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica
NeuroVectorizer: end-to-end vectorization with deep reinforcement learning. CGO (2020)
Angshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer
Timeloop: A Systematic Approach to DNN Accelerator Evaluation. ISPASS (2019)
Ameer Haj-Ali, Nesreen K. Ahmed, Theodore L. Willke, Yakun Sophia Shao, Krste Asanovic, Ion Stoica
NeuroVectorizer: End-to-End Vectorization with Deep Reinforcement Learning. CoRR (2019)
Rangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany
MAGNet: A Modular Accelerator Generator for Neural Networks. ICCAD (2019)
Brian Zimmer, Rangharajan Venkatesan, Yakun Sophia Shao, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm. VLSI Circuits (2019)
Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Stephen W. Keckler, Zhengya Zhang
SNAP: A 1.67 - 21.55TOPS/W Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference in 16nm CMOS. VLSI Circuits (2019)
Hasan Genc, Ameer Haj-Ali, Vighnesh Iyer, Alon Amid, Howard Mao, John Charles Wright, Colin Schmidt, Jerry Zhao, Albert J. Ou, Max Banister, Yakun Sophia Shao, Borivoje Nikolic, Ion Stoica, Krste Asanovic
Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures. CoRR (2019)
Yakun Sophia Shao, Jason Clemons, Rangharajan Venkatesan, Brian Zimmer, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Brucek Khailany, Stephen W. Keckler
Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture. MICRO (2019)
Michael Pellauer, Yakun Sophia Shao, Jason Clemons, Neal Clayton Crago, Kartik Hegde, Rangharajan Venkatesan, Stephen W. Keckler, Christopher W. Fletcher, Joel S. Emer
Buffets: An Efficient and Composable Storage Idiom for Explicit Decoupled Data Orchestration. ASPLOS (2019)
Rangharajan Venkatesan, Yakun Sophia Shao, Brian Zimmer, Jason Clemons, Matthew Fojtik, Nan Jiang, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Stephen G. Tell, Yanqing Zhang, William J. Dally, Joel S. Emer, C. Thomas Gray, Stephen W. Keckler, Brucek Khailany
A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology. Hot Chips Symposium (2019)
Brucek Khailany, Evgeni Khmer, Rangharajan Venkatesan, Jason Clemons, Joel S. Emer, Matthew Fojtik, Alicia Klinefelter, Michael Pellauer, Nathaniel Ross Pinckney, Yakun Sophia Shao, Shreesha Srinath, Christopher Torng, Sam Likun Xi, Yanqing Zhang, Brian Zimmer
A modular digital VLSI flow for high-productivity SoC design. DAC (2018)
Rafael Garibotti, Brandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
Assisting High-Level Synthesis Improve SpMV Benchmark Through Dynamic Dependence Analysis. IEEE Trans. Circuits Syst. II Express Briefs (10) (2018)
Martha A. Kim, Yakun Sophia Shao
Hardware Acceleration. IEEE Micro 38 (6) (2018)
Rafael Garibotti, Brandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
Using dynamic dependence analysis to improve the quality of high-level synthesis designs. ISCAS (2017)
Brandon Reagen, Yakun Sophia Shao, Sam Likun Xi, Gu-Yeon Wei, David Brooks
Methods and infrastructure in the era of accelerator-centric architectures. MWSCAS (2017)
Yakun Sophia Shao, Sam Likun Xi, Vijayalakshmi Srinivasan, Gu-Yeon Wei, David M. Brooks
Co-designing accelerators and SoC interfaces using gem5-Aladdin. MICRO (2016)
Yakun Sophia Shao, Brandon Reagen, Gu-Yeon Wei, David M. Brooks
The Aladdin Approach to Accelerator Design and Modeling. IEEE Micro 35 (3) (2015)
Yakun Sophia Shao, Brandon Reagen, Gu-Yeon Wei, David M. Brooks
Aladdin: A pre-RTL, power-performance accelerator simulator enabling large design space exploration of customized architectures. ISCA (2014)
Brandon Reagen, Robert Adolf, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
MachSuite: Benchmarks for accelerator design and customized architectures. IISWC (2014)
Brandon Reagen, Yakun Sophia Shao, Gu-Yeon Wei, David M. Brooks
Quantifying acceleration: Power/performance trade-offs of application kernels in hardware. ISLPED (2013)
Yakun Sophia Shao, David M. Brooks
ISA-independent workload characterization and its implications for specialized architectures. ISPASS (2013)
Yakun Sophia Shao, David M. Brooks
Energy characterization and instruction-level energy model of Intel's Xeon Phi processor. ISLPED (2013)