Vighnesh Iyer

Publication Activity (10 Years)

Years Active: 2019-2024
Publications (10 Years): 8

Top Topics

Nested Transactions

Programming Course

Bug Localization

Hardware Design

Top Venues

Publications

Kevin Laeufer, Brandon Fajardo, Abhik Ahuja, Vighnesh Iyer, Borivoje Nikolic, Koushik Sen
RTL-Repair: Fast Symbolic Repair of Hardware Design Code. ASPLOS (3) (2024)
Kevin Laeufer, Vighnesh Iyer, David Biancolin, Jonathan Bachrach, Borivoje Nikolic, Koushik Sen
Simulator Independent Coverage for RTL Hardware Languages. ASPLOS (3) (2023)
Aditi Deo, Dhrumil Thakore, Riddhi Mistry, Vighnesh Iyer, Prachi Tawde
A Review of Emotion Detection Systems. IC3I (2022)
Hasan Genc, Seah Kim, Alon Amid, Ameer Haj-Ali, Vighnesh Iyer, Pranav Prakash, Jerry Zhao, Daniel Grubb, Harrison Liew, Howard Mao, Albert J. Ou, Colin Schmidt, Samuel Steffl, John Charles Wright, Ion Stoica, Jonathan Ragan-Kelley, Krste Asanovic, Borivoje Nikolic, Yakun Sophia Shao
Gemmini: Enabling Systematic Deep-Learning Architecture Evaluation via Full-Stack Integration. DAC (2021)
Vighnesh Iyer, Craig B. Zilles
Pattern Census: A Characterization of Pattern Usage in Early Programming Courses. SIGCSE (2021)
John Charles Wright, Colin Schmidt, Ben Keller, Daniel Palmer Dabbelt, Jaehwa Kwak, Vighnesh Iyer, Nandish Mehta, Pi-Feng Chiu, Stevo Bailey, Krste Asanovic, Borivoje Nikolic
A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. 28 (12) (2020)
Hasan Genc, Ameer Haj-Ali, Vighnesh Iyer, Alon Amid, Howard Mao, John Charles Wright, Colin Schmidt, Jerry Zhao, Albert J. Ou, Max Banister, Yakun Sophia Shao, Borivoje Nikolic, Ion Stoica, Krste Asanovic
Gemmini: An Agile Systolic Array Generator Enabling Systematic Evaluations of Deep-Learning Architectures. CoRR (2019)
Vighnesh Iyer, Donggyu Kim, Borivoje Nikolic, Sanjit A. Seshia
RTL bug localization through LTL specification mining (WIP). MEMOCODE (2019)