Pi-Feng Chiu

Publication Activity (10 Years)

Years Active: 2010-2020
Publications (10 Years): 19

Top Topics

Power Management

Application Specific

Reservoir Computing

Top Venues

IEEE J. Solid State Circuits

Publications

Wen Ma, Tyler Hennen, Martin Lueker-Boden, Rick Galbraith, Jonas Goode, Won Ho Choi, Pi-Feng Chiu, Jonathan A. J. Rupp, Dirk J. Wouters, Rainer Waser, Daniel Bedau
A Mott Insulator-Based Oscillator Circuit for Reservoir Computing. ISCAS (2020)
Wen Ma, Pi-Feng Chiu, Won Ho Choi, Minghai Qin, Daniel Bedau, Martin Lueker-Boden
Non-Volatile Memory Array Based Quantization- and Noise-Resilient LSTM Neural Networks. CoRR (2020)
Won Ho Choi, Pi-Feng Chiu, Wen Ma, Gertjan Hemink, Tung Thanh Hoang, Martin Lueker-Boden, Zvonimir Bandic
An In-Flash Binary Neural Network Accelerator with SLC NAND Flash Array. ISCAS (2020)
John Charles Wright, Colin Schmidt, Ben Keller, Daniel Palmer Dabbelt, Jaehwa Kwak, Vighnesh Iyer, Nandish Mehta, Pi-Feng Chiu, Stevo Bailey, Krste Asanovic, Borivoje Nikolic
A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI. IEEE Trans. Very Large Scale Integr. Syst. 28 (12) (2020)
Wen Ma, Pi-Feng Chiu, Won Ho Choi, Minghai Qin, Daniel Bedau, Martin Lueker-Boden
Non-Volatile Memory Array Based Quantization- and Noise-Resilient LSTM Neural Networks. ICRC (2019)
Pi-Feng Chiu, Won Ho Choi, Wen Ma, Minghai Qin, Martin Lueker-Boden
A Binarized Neural Network Accelerator with Differential Crosspoint Memristor Array for Energy-Efficient MAC Operations. ISCAS (2019)
Christopher Celio, Pi-Feng Chiu, Krste Asanovic, Borivoje Nikolic, David A. Patterson
BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS. IEEE Micro 39 (2) (2019)
Pi-Feng Chiu, Christopher Celio, Krste Asanovic, David A. Patterson, Borivoje Nikolic
An Out-of-Order RISC-V Processor with Resilient Low-Voltage Operation in 28NM CMOS. VLSI Circuits (2018)
Wen Ma, Minghai Qin, Won Ho Choi, Pi-Feng Chiu, Martin Lueker-Boden
Improving Noise Tolerance of Hardware Accelerated Artificial Neural Networks. ICMLA (2018)
Ben Keller, Martin Cochet, Brian Zimmer, Jaehwa Kwak, Alberto Puggelli, Yunsup Lee, Milovan Blagojevic, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic
A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI. IEEE J. Solid State Circuits 52 (7) (2017)
Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic
Reduction in a 28-nm RISC-V Processor. IEEE J. Solid State Circuits 52 (10) (2017)
Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Steven Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic
A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. IEEE J. Solid State Circuits 51 (4) (2016)
Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Rimas Avizienis, Brian C. Richards, Jonathan Bachrach, David A. Patterson, Elad Alon, Bora Nikolic, Krste Asanovic
An Agile Approach to Building RISC-V Microprocessors. IEEE Micro 36 (2) (2016)
Brian Zimmer, Pi-Feng Chiu, Borivoje Nikolic, Krste Asanovic
Reprogrammable redundancy for cache Vmin reduction in a 28nm RISC-V processor. A-SSCC (2016)
Ben Keller, Martin Cochet, Brian Zimmer, Yunsup Lee, Milovan Blagojevic, Jaehwa Kwak, Alberto Puggelli, Stevo Bailey, Pi-Feng Chiu, Daniel Palmer Dabbelt, Colin Schmidt, Elad Alon, Krste Asanovic, Borivoje Nikolic
Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC. ESSCIRC (2016)
Pi-Feng Chiu, Brian Zimmer, Borivoje Nikolic
A double-tail sense amplifier for low-voltage SRAM in 28nm technology. A-SSCC (2016)
Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. VLSIC (2015)
Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Henry Cook, Rimas Avizienis, Brian C. Richards, Elad Alon, Borivoje Nikolic, Krste Asanovic
Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking. Hot Chips Symposium (2015)
Pi-Feng Chiu, Borivoje Nikolic
A Differential 2R Crosspoint RRAM Array With Zero Standby Current. IEEE Trans. Circuits Syst. II Express Briefs (5) (2015)
Meng-Fan Chang, Shyh-Shyuan Sheu, Ku-Feng Lin, Che-Wei Wu, Chia-Chen Kuo, Pi-Feng Chiu, Yih-Shan Yang, Yu-Sheng Chen, Heng-Yuan Lee, Chen-Hsin Lien, Frederick T. Chen, Keng-Li Su, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai
A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes. IEEE J. Solid State Circuits 48 (3) (2013)
Meng-Fan Chang, Ching-Hao Chuang, Min-Ping Chen, Lai-Fu Chen, Hiroyuki Yamauchi, Pi-Feng Chiu, Shyh-Shyuan Sheu
Endurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device. ASP-DAC (2012)
Pi-Feng Chiu, Meng-Fan Chang, Che-Wei Wu, Ching-Hao Chuang, Shyh-Shyuan Sheu, Yu-Sheng Chen, Ming-Jinn Tsai
Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications. IEEE J. Solid State Circuits 47 (6) (2012)
Shyh-Shyuan Sheu, Meng-Fan Chang, Ku-Feng Lin, Che-Wei Wu, Yu-Sheng Chen, Pi-Feng Chiu, Chia-Chen Kuo, Yih-Shan Yang, Pei-Chia Chiang, Wen-Pin Lin, Che-He Lin, Heng-Yuan Lee, Peiyi Gu, Sumin Wang, Frederick T. Chen, Keng-Li Su, Chen-Hsin Lien, Kuo-Hsing Cheng, Hsin-Tun Wu, Tzu-Kun Ku, Ming-Jer Kao, Ming-Jinn Tsai
A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability. ISSCC (2011)
Meng-Fan Chang, Pi-Feng Chiu, Shyh-Shyuan Sheu
Circuit design challenges in embedded memory and resistive RAM (RRAM) for mobile SoC and 3D-IC. ASP-DAC (2011)
Meng-Fan Chang, Pi-Feng Chiu, Wei-Cheng Wu, Ching-Hao Chuang, Shyh-Shyuan Sheu
Challenges and trends in low-power 3D die-stacked IC designs using RAM, memristor logic, and resistive memory (ReRAM). ASICON (2011)
Meng-Fan Chang, Shu-Meng Yang, Chih-Wei Liang, Chih-Chyuang Chiang, Pi-Feng Chiu, Ku-Feng Lin, Yuan-Hua Chu, Wen-Chin Wu, Hiroyuki Yamauchi
A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications. ISSCC (2010)
Meng-Fan Chang, Shu-Meng Yang, Chih-Wei Liang, Chih-Chyuang Chiang, Pi-Feng Chiu, Ku-Feng Lin
Noise-Immune Embedded NAND-ROM Using a Dynamic Split Source-Line Scheme for VDDmin and Speed Improvements. IEEE J. Solid State Circuits 45 (10) (2010)