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Brian Zimmer
ORCID
Publication Activity (10 Years)
Years Active: 2012-2024
Publications (10 Years): 41
Top Topics
Deep Learning
Neural Network
Gradient Vector
Uniform Quantization
Top Venues
IEEE J. Solid State Circuits
CICC
VLSI Technology and Circuits
A-SSCC
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Publications
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Walker J. Turner
,
John W. Poulton
,
Yoshinori Nishi
,
Xi Chen
,
Brian Zimmer
,
Sanquan Song
,
John M. Wilson
,
William J. Dally
,
C. Thomas Gray
Leveraging Micro-Bump Pitch Scaling to Accelerate Interposer Link Bandwidths for Future High-Performance Compute Applications.
CICC
(2024)
Yoshinori Nishi
,
John W. Poulton
,
Walker J. Turner
,
Xi Chen
,
Sanquan Song
,
Brian Zimmer
,
Stephen G. Tell
,
Nikola Nedovic
,
John M. Wilson
,
William J. Dally
,
C. Thomas Gray
A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS.
IEEE J. Solid State Circuits
59 (4) (2024)
Sudhir S. Kudva
,
Mahmut Ersin Sinangil
,
Stephen G. Tell
,
Nikola Nedovic
,
Sanquan Song
,
Brian Zimmer
,
C. Thomas Gray
16.4 High-Density and Low-Power PUF Designs in 5nm Achieving 23× and 39× BER Reduction After Unstable Bit Detection and Masking.
ISSCC
(2024)
Ben Keller
,
Rangharajan Venkatesan
,
Steve Dai
,
Stephen G. Tell
,
Brian Zimmer
,
Charbel Sakr
,
William J. Dally
,
C. Thomas Gray
,
Brucek Khailany
A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nm.
IEEE J. Solid State Circuits
58 (4) (2023)
Yoshinori Nishi
,
John W. Poulton
,
Walker J. Turner
,
Xi Chen
,
Sanquan Song
,
Brian Zimmer
,
Stephen G. Tell
,
Nikola Nedovic
,
John M. Wilson
,
William J. Dally
,
C. Thomas Gray
A 0.297-pJ/Bit 50.4-Gb/s/Wire Inverter-Based Short-Reach Simultaneous Bi-Directional Transceiver for Die-to-Die Interface in 5-nm CMOS.
IEEE J. Solid State Circuits
58 (4) (2023)
Yoshinori Nishi
,
John W. Poulton
,
Xi Chen
,
Sanquan Song
,
Brian Zimmer
,
Walker J. Turner
,
Stephen G. Tell
,
Nikola Nedovic
,
John M. Wilson
,
William J. Dally
,
C. Thomas Gray
A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS.
VLSI Technology and Circuits
(2023)
Yoshinori Nishi
,
John W. Poulton
,
Xi Chen
,
Sanquan Song
,
Brian Zimmer
,
Walker J. Turner
,
Stephen G. Tell
,
Nikola Nedovic
,
John M. Wilson
,
William J. Dally
,
C. Thomas Gray
A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS.
VLSI Technology and Circuits
(2022)
Charbel Sakr
,
Steve Dai
,
Rangharajan Venkatesan
,
Brian Zimmer
,
William J. Dally
,
Brucek Khailany
Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training.
ICML
(2022)
Sanquan Song
,
Stephen G. Tell
,
Brian Zimmer
,
Sudhir S. Kudva
,
Nikola Nedovic
,
C. Thomas Gray
An FLL-Based Clock Glitch Detector for Security Circuits in a 5nm FINFET Process.
VLSI Technology and Circuits
(2022)
Jiawei Zhao
,
Steve Dai
,
Rangharajan Venkatesan
,
Brian Zimmer
,
Mustafa Fayez Ali
,
Ming-Yu Liu
,
Brucek Khailany
,
William J. Dally
,
Anima Anandkumar
LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update.
IEEE Trans. Computers
71 (12) (2022)
Charbel Sakr
,
Steve Dai
,
Rangharajan Venkatesan
,
Brian Zimmer
,
William J. Dally
,
Brucek Khailany
Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware Training.
CoRR
(2022)
Hao Chen
,
Walker J. Turner
,
Sanquan Song
,
Keren Zhu
,
George F. Kokai
,
Brian Zimmer
,
C. Thomas Gray
,
Brucek Khailany
,
David Z. Pan
,
Haoxing Ren
AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET Technologies.
ISPD
(2022)
Ben Keller
,
Rangharajan Venkatesan
,
Steve Dai
,
Stephen G. Tell
,
Brian Zimmer
,
William J. Dally
,
C. Thomas Gray
,
Brucek Khailany
A 17-95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nm.
VLSI Technology and Circuits
(2022)
Steve Dai
,
Rangharajan Venkatesan
,
Mark Ren
,
Brian Zimmer
,
William J. Dally
,
Brucek Khailany
VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference.
MLSys
(2021)
Steve Dai
,
Rangharajan Venkatesan
,
Haoxing Ren
,
Brian Zimmer
,
William J. Dally
,
Brucek Khailany
VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network Inference.
CoRR
(2021)
Yakun Sophia Shao
,
Jason Clemons
,
Rangharajan Venkatesan
,
Brian Zimmer
,
Matthew Fojtik
,
Nan Jiang
,
Ben Keller
,
Alicia Klinefelter
,
Nathaniel Ross Pinckney
,
Priyanka Raina
,
Stephen G. Tell
,
Yanqing Zhang
,
William J. Dally
,
Joel S. Emer
,
C. Thomas Gray
,
Brucek Khailany
,
Stephen W. Keckler
Simba: scaling deep-learning inference with chiplet-based architecture.
Commun. ACM
64 (6) (2021)
Xi Chen
,
Nikola Nedovic
,
Stephen G. Tell
,
Sudhir S. Kudva
,
Brian Zimmer
,
Thomas H. Greer
,
John W. Poulton
,
Sanquan Song
,
Walker J. Turner
,
John M. Wilson
,
C. Thomas Gray
6.6 Reference-Noise Compensation Scheme for Single-Ended Package-to-Package Links.
ISSCC
(2020)
Brian Zimmer
,
Rangharajan Venkatesan
,
Yakun Sophia Shao
,
Jason Clemons
,
Matthew Fojtik
,
Nan Jiang
,
Ben Keller
,
Alicia Klinefelter
,
Nathaniel Ross Pinckney
,
Priyanka Raina
,
Stephen G. Tell
,
Yanqing Zhang
,
William J. Dally
,
Joel S. Emer
,
C. Thomas Gray
,
Stephen W. Keckler
,
Brucek Khailany
A 0.32-128 TOPS, Scalable Multi-Chip-Module-Based Deep Neural Network Inference Accelerator With Ground-Referenced Signaling in 16 nm.
IEEE J. Solid State Circuits
55 (4) (2020)
John W. Poulton
,
John M. Wilson
,
Walker J. Turner
,
Brian Zimmer
,
Xi Chen
,
Sudhir S. Kudva
,
Sanquan Song
,
Stephen G. Tell
,
Nikola Nedovic
,
Wenxu Zhao
,
Sunil R. Sudhakaran
,
C. Thomas Gray
,
William J. Dally
A 1.17-pJ/b, 25-Gb/s/pin Ground-Referenced Single-Ended Serial Link for Off- and On-Package Communication Using a Process- and Temperature-Adaptive Voltage Regulator.
IEEE J. Solid State Circuits
54 (1) (2019)
Rangharajan Venkatesan
,
Yakun Sophia Shao
,
Miaorong Wang
,
Jason Clemons
,
Steve Dai
,
Matthew Fojtik
,
Ben Keller
,
Alicia Klinefelter
,
Nathaniel Ross Pinckney
,
Priyanka Raina
,
Yanqing Zhang
,
Brian Zimmer
,
William J. Dally
,
Joel S. Emer
,
Stephen W. Keckler
,
Brucek Khailany
MAGNet: A Modular Accelerator Generator for Neural Networks.
ICCAD
(2019)
Brian Zimmer
,
Rangharajan Venkatesan
,
Yakun Sophia Shao
,
Jason Clemons
,
Matthew Fojtik
,
Nan Jiang
,
Ben Keller
,
Alicia Klinefelter
,
Nathaniel Ross Pinckney
,
Priyanka Raina
,
Stephen G. Tell
,
Yanqing Zhang
,
William J. Dally
,
Joel S. Emer
,
C. Thomas Gray
,
Stephen W. Keckler
,
Brucek Khailany
A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator with Ground-Reference Signaling in 16nm.
VLSI Circuits
(2019)
Angad S. Rekhi
,
Brian Zimmer
,
Nikola Nedovic
,
Ningxi Liu
,
Rangharajan Venkatesan
,
Miaorong Wang
,
Brucek Khailany
,
William J. Dally
,
C. Thomas Gray
Analog/Mixed-Signal Hardware Error Modeling for Deep Learning Inference.
DAC
(2019)
Yakun Sophia Shao
,
Jason Clemons
,
Rangharajan Venkatesan
,
Brian Zimmer
,
Matthew Fojtik
,
Nan Jiang
,
Ben Keller
,
Alicia Klinefelter
,
Nathaniel Ross Pinckney
,
Priyanka Raina
,
Stephen G. Tell
,
Yanqing Zhang
,
William J. Dally
,
Joel S. Emer
,
C. Thomas Gray
,
Brucek Khailany
,
Stephen W. Keckler
Simba: Scaling Deep-Learning Inference with Multi-Chip-Module-Based Architecture.
MICRO
(2019)
Matthew Fojtik
,
Ben Keller
,
Alicia Klinefelter
,
Nathaniel Ross Pinckney
,
Stephen G. Tell
,
Brian Zimmer
,
Tezaswi Raja
,
Kevin Zhou
,
William J. Dally
,
Brucek Khailany
A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFET.
ASYNC
(2019)
Sanquan Song
,
John Poulton
,
Xi Chen
,
Brian Zimmer
,
Stephen G. Tell
,
Walker J. Turner
,
Sudhir S. Kudva
,
Nikola Nedovic
,
John M. Wilson
,
C. Thomas Gray
,
William J. Dally
A 2-to-20 GHz Multi-Phase Clock Generator with Phase Interpolators Using Injection-Locked Oscillation Buffers for High-Speed IOs in 16nm FinFET.
CICC
(2019)
Xi Chen
,
Sanquan Song
,
John Poulton
,
Nikola Nedovic
,
Brian Zimmer
,
Stephen G. Tell
,
C. Thomas Gray
Voltage-Follower Coupling Quadrature Oscillator with Embedded Phase-Interpolator in 16nm FinFET.
CICC
(2019)
Rangharajan Venkatesan
,
Yakun Sophia Shao
,
Brian Zimmer
,
Jason Clemons
,
Matthew Fojtik
,
Nan Jiang
,
Ben Keller
,
Alicia Klinefelter
,
Nathaniel Ross Pinckney
,
Priyanka Raina
,
Stephen G. Tell
,
Yanqing Zhang
,
William J. Dally
,
Joel S. Emer
,
C. Thomas Gray
,
Stephen W. Keckler
,
Brucek Khailany
A 0.11 PJ/OP, 0.32-128 Tops, Scalable Multi-Chip-Module-Based Deep Neural Network Accelerator Designed with A High-Productivity vlsi Methodology.
Hot Chips Symposium
(2019)
Walker J. Turner
,
John W. Poulton
,
John M. Wilson
,
Xi Chen
,
Stephen G. Tell
,
Matthew Fojtik
,
Thomas H. Greer
,
Brian Zimmer
,
Sanquan Song
,
Nikola Nedovic
,
Sudhir S. Kudva
,
Sunil R. Sudhakaran
,
Rizwan Bashirullah
,
Wenxu Zhao
,
William J. Dally
,
C. Thomas Gray
Ground-referenced signaling for intra-chip and short-reach chip-to-chip interconnects.
CICC
(2018)
Brucek Khailany
,
Evgeni Khmer
,
Rangharajan Venkatesan
,
Jason Clemons
,
Joel S. Emer
,
Matthew Fojtik
,
Alicia Klinefelter
,
Michael Pellauer
,
Nathaniel Ross Pinckney
,
Yakun Sophia Shao
,
Shreesha Srinath
,
Christopher Torng
,
Sam Likun Xi
,
Yanqing Zhang
,
Brian Zimmer
A modular digital VLSI flow for high-productivity SoC design.
DAC
(2018)
Michael B. Sullivan
,
Siva Kumar Sastry Hari
,
Brian Zimmer
,
Timothy Tsai
,
Stephen W. Keckler
SwapCodes: Error Codes for Hardware-Software Cooperative GPU Pipeline Error Detection.
MICRO
(2018)
John M. Wilson
,
Walker J. Turner
,
John W. Poulton
,
Brian Zimmer
,
Xi Chen
,
Sudhir S. Kudva
,
Sanquan Song
,
Stephen G. Tell
,
Nikola Nedovic
,
Wenxu Zhao
,
Sunil R. Sudhakaran
,
C. Thomas Gray
,
William J. Dally
A 1.17pJ/b 25Gb/s/pin ground-referenced single-ended serial link for off- and on-package communication in 16nm CMOS using a process- and temperature-adaptive voltage regulator.
ISSCC
(2018)
Ben Keller
,
Martin Cochet
,
Brian Zimmer
,
Jaehwa Kwak
,
Alberto Puggelli
,
Yunsup Lee
,
Milovan Blagojevic
,
Stevo Bailey
,
Pi-Feng Chiu
,
Daniel Palmer Dabbelt
,
Colin Schmidt
,
Elad Alon
,
Krste Asanovic
,
Borivoje Nikolic
A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI.
IEEE J. Solid State Circuits
52 (7) (2017)
Brian Zimmer
,
Pi-Feng Chiu
,
Borivoje Nikolic
,
Krste Asanovic
Reduction in a 28-nm RISC-V Processor.
IEEE J. Solid State Circuits
52 (10) (2017)
Brian Zimmer
,
Yunsup Lee
,
Alberto Puggelli
,
Jaehwa Kwak
,
Ruzica Jevtic
,
Ben Keller
,
Steven Bailey
,
Milovan Blagojevic
,
Pi-Feng Chiu
,
Hanh-Phuc Le
,
Po-Hung Chen
,
Nicholas Sutardja
,
Rimas Avizienis
,
Andrew Waterman
,
Brian C. Richards
,
Philippe Flatresse
,
Elad Alon
,
Krste Asanovic
,
Borivoje Nikolic
A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI.
IEEE J. Solid State Circuits
51 (4) (2016)
Martin Cochet
,
Alberto Puggelli
,
Ben Keller
,
Brian Zimmer
,
Milovan Blagojevic
,
Sylvain Clerc
,
Philippe Roche
,
Jean-Luc Autran
,
Borivoje Nikolic
On-chip supply power measurement and waveform reconstruction in a 28nm FD-SOI processor SoC.
A-SSCC
(2016)
Donggyu Kim
,
Adam M. Izraelevitz
,
Christopher Celio
,
Hokeun Kim
,
Brian Zimmer
,
Yunsup Lee
,
Jonathan Bachrach
,
Krste Asanovic
Strober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary RTL.
ISCA
(2016)
Yunsup Lee
,
Andrew Waterman
,
Henry Cook
,
Brian Zimmer
,
Ben Keller
,
Alberto Puggelli
,
Jaehwa Kwak
,
Ruzica Jevtic
,
Stevo Bailey
,
Milovan Blagojevic
,
Pi-Feng Chiu
,
Rimas Avizienis
,
Brian C. Richards
,
Jonathan Bachrach
,
David A. Patterson
,
Elad Alon
,
Bora Nikolic
,
Krste Asanovic
An Agile Approach to Building RISC-V Microprocessors.
IEEE Micro
36 (2) (2016)
Brian Zimmer
,
Pi-Feng Chiu
,
Borivoje Nikolic
,
Krste Asanovic
Reprogrammable redundancy for cache Vmin reduction in a 28nm RISC-V processor.
A-SSCC
(2016)
Ben Keller
,
Martin Cochet
,
Brian Zimmer
,
Yunsup Lee
,
Milovan Blagojevic
,
Jaehwa Kwak
,
Alberto Puggelli
,
Stevo Bailey
,
Pi-Feng Chiu
,
Daniel Palmer Dabbelt
,
Colin Schmidt
,
Elad Alon
,
Krste Asanovic
,
Borivoje Nikolic
Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC.
ESSCIRC
(2016)
Mahmut E. Sinangil
,
John W. Poulton
,
Matthew R. Fojtik
,
Thomas H. Greer
,
Stephen G. Tell
,
Andreas J. Gotterba
,
Jesse Wang
,
Jason Golbus
,
Brian Zimmer
,
William J. Dally
,
C. Thomas Gray
A 28 nm 2 Mbit 6 T SRAM With Highly Configurable Low-Voltage Write-Ability Assist Implementation and Capacitor-Based Sense-Amplifier Input Offset Compensation.
IEEE J. Solid State Circuits
51 (2) (2016)
Pi-Feng Chiu
,
Brian Zimmer
,
Borivoje Nikolic
A double-tail sense amplifier for low-voltage SRAM in 28nm technology.
A-SSCC
(2016)
Brian Zimmer
,
Yunsup Lee
,
Alberto Puggelli
,
Jaehwa Kwak
,
Ruzica Jevtic
,
Ben Keller
,
Stevo Bailey
,
Milovan Blagojevic
,
Pi-Feng Chiu
,
Hanh-Phuc Le
,
Po-Hung Chen
,
Nicholas Sutardja
,
Rimas Avizienis
,
Andrew Waterman
,
Brian C. Richards
,
Philippe Flatresse
,
Elad Alon
,
Krste Asanovic
,
Borivoje Nikolic
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI.
VLSIC
(2015)
Yunsup Lee
,
Brian Zimmer
,
Andrew Waterman
,
Alberto Puggelli
,
Jaehwa Kwak
,
Ruzica Jevtic
,
Ben Keller
,
Stevo Bailey
,
Milovan Blagojevic
,
Pi-Feng Chiu
,
Henry Cook
,
Rimas Avizienis
,
Brian C. Richards
,
Elad Alon
,
Borivoje Nikolic
,
Krste Asanovic
Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking.
Hot Chips Symposium
(2015)
Brian Zimmer
,
Olivier Thomas
,
Seng Oon Toh
,
Taylor Vincent
,
Krste Asanovic
,
Borivoje Nikolic
Joint impact of random variations and RTN on dynamic writeability in 28nm bulk and FDSOI SRAM.
ESSDERC
(2014)
Brian Zimmer
,
Seng Oon Toh
,
Huy Vo
,
Yunsup Lee
,
Olivier Thomas
,
Krste Asanovic
,
Borivoje Nikolic
SRAM Assist Techniques for Operation in a Wide Voltage Range in 28-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
(12) (2012)