Mustafa Fayez Ali

Publication Activity (10 Years)

Years Active: 2019-2023
Publications (10 Years): 20

Top Topics

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Mustafa Fayez Ali, Indranil Chakraborty, Sakshi Choudhary, Muya Chang, Dong Eun Kim, Arijit Raychowdhury, Kaushik Roy
A 65 nm 1.4-6.7 TOPS/W Adaptive-SNR Sparsity-Aware CIM Core with Load Balancing Support for DL workloads. CICC (2023)
Tanvi Sharma, Mustafa Fayez Ali, Indranil Chakraborty, Kaushik Roy
WWW: What, When, Where to Compute-in-Memory. CoRR (2023)
Jiawei Zhao, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, Mustafa Fayez Ali, Ming-Yu Liu, Brucek Khailany, William J. Dally, Anima Anandkumar
LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update. IEEE Trans. Computers 71 (12) (2022)
Mustafa Fayez Ali, Sourjya Roy, Utkarsh Saxena, Tanvi Sharma, Anand Raghunathan, Kaushik Roy
Compute-in-Memory Technologies and Architectures for Deep Learning Workloads. IEEE Trans. Very Large Scale Integr. Syst. 30 (11) (2022)
Indranil Chakraborty, Sourjya Roy, Shrihari Sridharan, Mustafa Fayez Ali, Aayush Ankit, Shubham Jain, Anand Raghunathan
Design Tools for Resistive Crossbar based Machine Learning Accelerators. AICAS (2021)
Amogh Agrawal, Mustafa Fayez Ali, Minsuk Koo, Nitin Rathi, Akhilesh Jaiswal, Kaushik Roy
IMPULSE: A 65nm Digital Compute-in-Memory Macro with Fused Weights and Membrane Potential for Spike-based Sequential Learning Tasks. CoRR (2021)
Sourjya Roy, Mustafa Fayez Ali, Anand Raghunathan
PIM-DRAM: Accelerating Machine Learning Workloads Using Processing in Commodity DRAM. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (4) (2021)
Sourjya Roy, Mustafa Fayez Ali, Anand Raghunathan
PIM-DRAM: Accelerating Machine Learning Workloads using Processing in Commodity DRAM. CoRR (2021)
Kaushik Roy, Indranil Chakraborty, Mustafa Fayez Ali, Aayush Ankit, Amogh Agrawal
In-Memory Computing in Emerging Memory Technologies for Machine Learning: An Overview. DAC (2020)
Indranil Chakraborty, Mustafa Fayez Ali, Dong Eun Kim, Aayush Ankit, Kaushik Roy
GENIEx: A Generalized Approach to Emulating Non-Ideality in Memristive Xbars using Neural Networks. DAC (2020)
Mustafa Fayez Ali, Akhilesh Jaiswal, Kaushik Roy
In-Memory Low-Cost Bit-Serial Addition Using Commodity DRAM Technology. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2020)
Mustafa Fayez Ali, Akhilesh Jaiswal, Sangamesh Kodge, Amogh Agrawal, Indranil Chakraborty, Kaushik Roy
IMAC: In-memory multi-bit Multiplication andACcumulation in 6T SRAM Array. CoRR (2020)
Indranil Chakraborty, Mustafa Fayez Ali, Dong Eun Kim, Aayush Ankit, Kaushik Roy
GENIEx: A Generalized Approach to Emulating Non-Ideality in Memristive Xbars using Neural Networks. CoRR (2020)
Indranil Chakraborty, Mustafa Fayez Ali, Aayush Ankit, Shubham Jain, Sourjya Roy, Shrihari Sridharan, Amogh Agrawal, Anand Raghunathan, Kaushik Roy
Resistive Crossbars as Approximate Hardware Building Blocks for Machine Learning: Opportunities and Challenges. Proc. IEEE 108 (12) (2020)
Akhilesh Jaiswal, Amogh Agrawal, Mustafa Fayez Ali, Saima Sharmin, Kaushik Roy
i-SRAM: Interleaved Wordlines for Vector Boolean Operations Using SRAMs. IEEE Trans. Circuits Syst. (12) (2020)
Aayush Ankit, Indranil Chakraborty, Amogh Agrawal, Mustafa Fayez Ali, Kaushik Roy
Circuits and Architectures for In-Memory Computing-Based Machine Learning Accelerators. IEEE Micro 40 (6) (2020)
Mustafa Fayez Ali, Amogh Agrawal, Kaushik Roy
RAMANN: in-SRAM differentiable memory computations for memory-augmented neural networks. ISLPED (2020)
Mustafa Fayez Ali, Robert Andrawis, Kaushik Roy
Dynamic Read Current Sensing With Amplified Bit-Line Voltage for STT-MRAMs. IEEE Trans. Circuits Syst. II Express Briefs (3) (2020)
Mustafa Fayez Ali, Akhilesh Jaiswal, Sangamesh Kodge, Amogh Agrawal, Indranil Chakraborty, Kaushik Roy
IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2020)
Akhilesh Jaiswal, Amogh Agrawal, Indranil Chakraborty, Mustafa Fayez Ali, Kaushik Roy
Digital and Analog-Mixed-Signal In-Memory Processing in CMOS SRAM. ACM Great Lakes Symposium on VLSI (2019)