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A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOS.

Yoshinori NishiJohn W. PoultonWalker J. TurnerXi ChenSanquan SongBrian ZimmerStephen G. TellNikola NedovicJohn M. WilsonWilliam J. DallyC. Thomas Gray
Published in: IEEE J. Solid State Circuits (2024)
Keyphrases
  • high speed
  • low cost
  • random access memory
  • power consumption
  • cmos technology
  • nm technology
  • real time
  • user interface
  • circuit design
  • silicon on insulator