Ruzica Jevtic

Publication Activity (10 Years)

Years Active: 2007-2022
Publications (10 Years): 6

Top Topics

Dc Dc Converter

Amplitude Modulation

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Ruzica Jevtic, Pablo Perez-Tirador, Carmen Cabezaolias, Pablo Carnero, Gabriel Caffarena
Side-channel Attack Countermeasure Based on Power Supply Modulation. EUSIPCO (2022)
Ruzica Jevtic, Mariano García Otero
Methodology for Complete Decorrelation of Power Supply EM Side-Channel Signal and Sensitive Data. IEEE Trans. Circuits Syst. II Express Briefs 69 (4) (2022)
Ruzica Jevtic, Marko Ylitolva, Clara Calonge, Martti Ojanen, Tero Säntti, Lauri Koskinen
EM Side-Channel Countermeasure for Switched-Capacitor DC-DC Converters Based on Amplitude Modulation. IEEE Trans. Very Large Scale Integr. Syst. 29 (6) (2021)
Ruzica Jevtic, Marko Ylitolva, Lauri Koskinen
Reconfigurable Switched Capacitor DC-DC Converter for Improved Security in IoT Devices. PATMOS (2018)
Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Steven Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic
A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI. IEEE J. Solid State Circuits 51 (4) (2016)
Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Rimas Avizienis, Brian C. Richards, Jonathan Bachrach, David A. Patterson, Elad Alon, Bora Nikolic, Krste Asanovic
An Agile Approach to Building RISC-V Microprocessors. IEEE Micro 36 (2) (2016)
Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic
A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI. VLSIC (2015)
Matthew J. Turnquist, Markus Hiienkari, Jani Mäkipää, Ruzica Jevtic, Elina Pohjalainen, Tanja Kallio, Lauri Koskinen
Fully integrated DC-DC converter and a 0.4V 32-bit CPU with timing-error prevention supplied from a prototype 1.55V Li-ion battery. VLSIC (2015)
Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Henry Cook, Rimas Avizienis, Brian C. Richards, Elad Alon, Borivoje Nikolic, Krste Asanovic
Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking. Hot Chips Symposium (2015)
Fernando Cardes, Ruzica Jevtic, Luis Hernández, Andreas Wiesbauer, Dietmar Sträußnigg, Richard Gaggl
A MEMS microphone interface based on a CMOS LC oscillator and a digital sigma-delta modulator. ISCAS (2015)
Ruzica Jevtic, Hanh-Phuc Le, Milovan Blagojevic, Stevo Bailey, Krste Asanovic, Elad Alon, Borivoje Nikolic
Per-Core DVFS With Switched-Capacitor Converters for Energy Efficiency in Manycore Processors. IEEE Trans. Very Large Scale Integr. Syst. 23 (4) (2015)
Pablo Barrio, Carlos Carreras, Juan A. López, Óscar Robles, Ruzica Jevtic, Roberto Sierra
Memory optimization in FPGA-accelerated scientific codes based on unstructured meshes. J. Syst. Archit. 60 (7) (2014)
Bojan Jovanovic, Ruzica Jevtic, Carlos Carreras
Binary Division Power Models for High-Level Power Estimation of FPGA-Based DSP Circuits. IEEE Trans. Ind. Informatics 10 (1) (2014)
Ruzica Jevtic, Carlos Carreras
A complete dynamic power estimation model for data-paths in FPGA DSP designs. Integr. 45 (2) (2012)
Ruzica Jevtic, Bojan Jovanovic, Carlos Carreras
Power estimation of dividers implemented in FPGAs. ACM Great Lakes Symposium on VLSI (2011)
Ruzica Jevtic, Carlos Carreras
Power Measurement Methodology for FPGA Devices. IEEE Trans. Instrum. Meas. 60 (1) (2011)
Borivoje Nikolic, Ji-Hoon Park, Jaehwa Kwak, Bastien Giraud, Zheng Guo, Liang-Teck Pang, Seng Oon Toh, Ruzica Jevtic, Kun Qian, Costas J. Spanos
Technology Variability From a Design Perspective. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2011)
Ruzica Jevtic, Carlos Carreras
Power Estimation of Embedded Multiplier Blocks in FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 18 (5) (2010)
Ruzica Jevtic, Carlos Carreras, Vukasin Pejovic
Floorplan-based FPGA interconnect power estimation in DSP circuits. SLIP (2009)
Ruzica Jevtic, Carlos Carreras
Analytical High-Level Power Model for LUT-Based Components. PATMOS (2008)
Ruzica Jevtic, Carlos Carreras, Domenik Helms
A Comparison of Approaches for High-Level Power Estimation of LUT-Based DSP Components. ReConFig (2008)
Ruzica Jevtic, Carlos Carreras, Gabriel Caffarena
Switching Activity Models for Power Estimation in FPGA Multipliers. ARC (2007)