Juan A. López

Publication Activity (10 Years)

Years Active: 1999-2023
Publications (10 Years): 1

Top Topics

Fast Fourier Transform

Parallel Implementation

Top Venues

J. Syst. Archit.

Publications

Ignacio Amat Hernández, Juan A. López
Any-Radix Efficient Fully-Parallel Implementation of the Fast Fourier Transform on FPGAs. DCIS (2023)
Enrique Sedano, Daniel Ménard, Juan A. López
Automated Data Flow Graph Partitioning for a Hierarchical Approach to Wordlength Optimization. ARC (2014)
Pablo Barrio, Carlos Carreras, Juan A. López, Óscar Robles, Ruzica Jevtic, Roberto Sierra
Memory optimization in FPGA-accelerated scientific codes based on unstructured meshes. J. Syst. Archit. 60 (7) (2014)
Gabriel Caffarena, Olivier Sentieys, Daniel Ménard, Juan A. López, David Novo
Quantization of VLSI digital signal processing systems. EURASIP J. Adv. Signal Process. 2012 (2012)
Gabriel Caffarena, Carlos Carreras, Juan A. López, Angel Fernandez Herrero
Fast fixed-point optimization of DSP algorithms. VLSI-SoC (2010)
Gabriel Caffarena, Angel Fernandez Herrero, Juan A. López, Carlos Carreras
Fast Fixed-Point Optimization of DSP Algorithms. VLSI-SoC (Selected Papers) (2010)
Gabriel Caffarena, Juan A. López, Angel Fernandez Herrero, Carlos Carreras
SQNR estimation of non-linear fixed-point algorithms. EUSIPCO (2010)
Gabriel Caffarena, Carlos Carreras, Juan A. López, Angel Fernandez Herrero
SQNR Estimation of Fixed-Point DSP Algorithms. EURASIP J. Adv. Signal Process. 2010 (2010)
Gabriel Caffarena, Juan A. López, Gerardo Leyva, Carlos Carreras, Octavio Nieto-Taladriz
Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs. Int. J. Reconfigurable Comput. 2009 (2009)
Gabriel Caffarena, Juan A. López, Gerardo Leyva, Carlos Carreras, Octavio Nieto-Taladriz
Optimized Architectural Synthesis of Fixed-Point Datapaths. ReConFig (2008)
Juan A. López, Gabriel Caffarena, Carlos Carreras, Octavio Nieto-Taladriz
Fast and accurate computation of the roundoff noise of linear time-invariant systems. IET Circuits Devices Syst. 2 (4) (2008)
Juan A. López, Carlos Carreras, Octavio Nieto-Taladriz
Improved Interval-Based Characterization of Fixed-Point LTI Systems With Feedback Loops. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (11) (2007)
Gabriel Caffarena, Juan A. López, Carlos Carreras, Octavio Nieto-Taladriz
Optimized Synthesis of DSP Cores Combining Logic-based and Embedded FPGA Resources. SoC (2006)
Gabriel Caffarena, Juan A. López, Carlos Carreras, Octavio Nieto-Taladriz
High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs. FPL (2006)
Gabriel Caffarena, Slobodan Bojanic, Juan A. López, Carlos E. Pedreira, Octavio Nieto-Taladriz
High-speed systolic array for gene matching. FPGA (2004)
Juan A. López, Gabriel Caffarena, Carlos Carreras, Octavio Nieto-Taladriz
Analysis of limit cycles by means of affine arithmetic computer-aided tests. EUSIPCO (2004)
Juan A. López, Carlos Carreras, Gabriel Caffarena, Octavio Nieto-Taladriz
Fast characterization of the noise bounds derived from coefficient and signal quantization. ISCAS (4) (2003)
Carlos Carreras, Juan A. López, Octavio Nieto-Taladriz
Bit-Width Selection for Data-Path Implementations. ISSS (1999)