Roberto Sierra

Publication Activity (10 Years)

Years Active: 2009-2019
Publications (10 Years): 4

Top Topics

Code Generation

Stream Processing

Error Concealment

Top Venues

J. Syst. Archit.

Publications

Roberto Sierra, Filippo Mangani, Carlos Carreras, Gabriel Caffarena
High-Performance Decoding of Variable-Length Memory Data Packets for FPGA Stream Processing. FPL (2019)
Roberto Sierra, Carlos Carreras, Gabriel Caffarena
Witelo: Automated generation and timing characterization of distributed-control macroblocks for high-performance FPGA designs. Integr. 68 (2019)
Roberto Sierra, Carlos Carreras, Gabriel Caffarena
Automated Timing Characterization of High-Performance Macroblocks for Latency Insensitive FPGA Designs. PATMOS (2018)
Roberto Sierra, Carlos Carreras, Gabriel Caffarena, Carlos A. López Bario
A Formal Method for Optimal High-Level Casting of Heterogeneous Fixed-Point Adders and Subtractors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34 (1) (2015)
Pablo Barrio, Carlos Carreras, Juan A. López, Óscar Robles, Ruzica Jevtic, Roberto Sierra
Memory optimization in FPGA-accelerated scientific codes based on unstructured meshes. J. Syst. Archit. 60 (7) (2014)
Pablo Barrio, Carlos Carreras, Roberto Sierra, Tobias Kenter, Christian Plessl
Turning control flow graphs into function calls: Code generation for heterogeneous architectures. HPCS (2012)
Silvia Restrepo, Andrés Pinzón, Luis Miguel Rodriguez-Rojas, Roberto Sierra, Alejandro Grajales, Adriana Bernal, Emiliano Barreto, Pedro Moreno, Maria Mercedes Zambrano, Marco Cristancho, Andrés González, Harold E. Castro
Computational Biology in Colombia. PLoS Comput. Biol. 5 (10) (2009)